[introduction] radar signal processing needs to use what a large number of memory have intermediate result and final result to save, and the cost that memory size affects processing chip directly. Choose proper data storage form, preserve higher signal resolution and dynamic scope already, do not take up too large storage space is quite important again. The article introduced TC3xx sheet piece the form of semi-finish grinding floating-point that plane radar signal treats unit SPU to support, rectify its and 32bit model several formats undertake comparative, analysed both dynamic limits and actual processing error, discovering form of semi-finish grinding floating-point is ” sexual price is compared ” higher memory fashion. Additional, tricore? CPU still has special hardware instruction to support the mutual changeover of semi-finish grinding and format of odd precision floating-point, the later period of facilitating signal is handled, shorten data format changes time.

of Wei of money of Ying Feiling’s technologist

Setting introduction

Millimeter wave radar is inside shorter time (for instance 50ms every frame) need processes mass data, data bulk and send and receive aerial several, every send the sampling check the number of wave, and hair wave number becomes direct ratio. Below cite a case simply, convenient quantify data size, make everybody has perceptual knowledge. For instance, sampling check the number is 512, hair wave number is 128, chip of typical 3T4R front radio frequency, use means of the modulation that pile up cent, solid sampling ADC changes eventuate 14bit, but facilitate considering later period signal is handled, use 16bit commonly actually (2Byte) memory space will store. Express the 1 data that listed each treat stage to take up memory space size, this shows, radar signal processing is bigger to the demand of memory space, and memory size affects chip cost directly, so, can use a kind of reasonable data form, preserve higher signal resolution and dynamic scope already, do not take up too large storage space is quite important again.

Express 1.  The data place that treats stage each constitutes memory space bulk

Data format

TC3xx is odd the radar signal of a machine handles unit SPU, its output supports a variety of data forms, include 16, 32 are rectified model plural or real, floating-point of 16 semi-finish grinding. Among them the precision that floating-point of 16 semi-finish grinding can carry data already does not break wider dynamic range again, and take up memory is opposite less. According to IEEE 754 standard [1] , check the number of 16 semi-finish grinding float (Binary16) binary digit cent is 3 parts, the definition is as follows respectively:

1.Highest one is a symbol.

2.The most exalted 5 from the back show the index of 2, this value wants subtractive and fixed cost 15, just be final index.

3.10 when remain (be located in decimally on the right side of) fill again dominance of a blame (be in this decimally left the first) complex is significance 11.

Pick in order to give a definition from Wikipedia [2] . If oversight Subnormal and infinite numerical value, significance of semi-finish grinding floating-point is worth (Normal Value) for the least value is 10^(-5) of × of 6.10 of 2^(-14) ≈ . Numerical value is is maximum (2? 2^15 = 65504 of 2^(-10)) × .

Express 2.  The scale of floating-point of IEEE754 semi-finish grinding, pick from Wikipedia.

We compare 32 to rectify below model number and the dynamic range that floating-point of 16 semi-finish grinding counts, assume both symbol is.

Express 3. Limits of trends of different pattern data is compared

Compare discovery from above, both dynamic limits difference is 3dB, and the memory storage space that uses floating-point of 16 semi-finish grinding to take up is to use 32 to rectify however model the half of several, have stronger cost advantage to what choosing processor chip.

Nod with 16 semi-finish grinding float for SPU of farther test and verify number is rectified with 32 model the factual error of several, handle normalization of format of semi-finish grinding floating-point 32 to rectify with Matlab code model format, later with earning of SPU actual computation 32 digit are compared according to doing. The graph is shown 1 times is (result of FFT of the first dimension mixes A) (B) both error. Both the biggest error is 0.0021dB, and the maximum in result of FFT of the first dimension is 78.828dB, this error is quite small.

Graph 1. (Result of computation of A) SPU 1st FFT (DB) ; (B) 16 semi-finish grinding floating-point is counted and rectify 32 times model the result error of several (DB)

Format changeover

After SPU processes data, use Tricore normally? CPU undertakes one phase is calculated falling. Tricore? CPU is compositive hardware dictates [3] , OK and convenient undertake odd precision floating-point and semi-finish grinding floating-point count the changeover between the format. These two instructions are:

Two commonly used compile implement, tasking and Hightec Gnuc are compiled implement support above data format to change an instruction.

1.In Tasking environment, should appoint C to compile option- – Fp-model=-soft, c is compiled implement can make CPU hardware statement automatically, have kind of semi-finish grinding floating-point (_Float16) with type of odd precision floating-point (Float) the format changeover between.

2.In Hightec Gnuc environment, __float16 is the format kind of semi-finish grinding floating-point, the meeting when be being compiled generates a format automatically to change an instruction. For example the following code:

Summary

Radar signal processing needs to use what a large number of memory have intermediate result and final result to save, and the cost that memory size affects processing chip directly. Choose proper data storage form, preserve higher signal resolution and dynamic scope already, do not take up too large storage space is quite important again. The article introduced TC3xx sheet piece the form of semi-finish grinding floating-point that plane radar signal treats unit SPU to support, rectify its and 32bit model several formats undertake comparative, analysed both dynamic limits and actual processing error, discovering form of semi-finish grinding floating-point is ” sexual price is compared ” higher memory fashion. Additional, tricore? CPU still has special hardware instruction to support the mutual changeover of semi-finish grinding and format of odd precision floating-point, the later period of facilitating signal is handled, shorten data format changes time.

Bibliographical reference

1.  IEEE Standard For Floating-Point Arithmetic

2.Https://en.wikipedia.org/wiki/Half-precision_floating-point_format

3.TriCore_TC162P_core_architecture_vol2of2_Instruction_set

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