[introduction] the first challenge that affects ADC performance is compositive. MCU will be close be next to the ADC with ideal design. Noise of switch of meeting general of sudden switch MCU and ground connection rebound introduce ADC circuit. The circuit distribution question that asks function of imitate of influence board class to any imitate stylist that have experience, the tragic story that he can tell you any Shakespeare to dramatic phase is rivalled. Imagine now, circuit board dimension reduces the area of IC, the problem becomes solve hard. Clock synchronism and administrative technique can be used at falling these influences to lowest, but the interaction of peripheral and asynchronous incident still can affect ADC performance.

In our example, the client differentiates 12 ADC and MCU are compositive use at its to test a system, they think this ADC will provide the performance that contented system asks to need. Compositive the optimal friend that is a function. Compositive allow to add more function to equipment, reduce systematic dimension and cost thereby. But compositive enemy is function. In the MCU that chooses in the client, MCU is compositive a variety of 30 functions, ADC is among them one of. So many function must be accommodated to mean the compromise that should run performance side in odd chip.

Compositive how to affect performance? Let us see 4 factors that bring about ADC function to drop: Change of ability of compositive itself, test, temperature and engineering technology.

Compositive

The first challenge that affects ADC performance is compositive. MCU will be close be next to the ADC with ideal design. Noise of switch of meeting general of sudden switch MCU and ground connection rebound introduce ADC circuit. The circuit distribution question that asks function of imitate of influence board class to any imitate stylist that have experience, the tragic story that he can tell you any Shakespeare to dramatic phase is rivalled. Imagine now, circuit board dimension reduces the area of IC, the problem becomes solve hard. Clock synchronism and administrative technique can be used at falling these influences to lowest, but the interaction of peripheral and asynchronous incident still can affect ADC performance.

Test ability

The 2nd challenge is test ability. Small controller (MCU) it is digital facilities, accordingly, they use a number to check vector to check platform in the number aspirant travel checks. The number checked a solution to undertake optimizing in the light of the shortest test time, most unit can be acquired through the test inside the shortest time. These test platform have finite low function imitate to test ability normally. This is why the or of imitate peripheral norms on small controller ” assure through the design ” , or ” assure through token ” . These instrument can check imitate function or imitate function only normally, their ability without test imitate function – how does imitate function execute its function. In addition, the function of instrument restricts the performance standards that restricted ADC. If instrument has 1 KSPS 12 only function, cannot check appoint for 100 MSPS 8 the parts of an apparatus of ADC function. In addition, imitate test function adds a number to check the need on platform to check cost to raise an amount level, raise facility cost accordingly thereby.

Temperature changes

One of the oldest enemies that the 3rd challenge is imitate function — temperature. In an ideal world, the temperature outdoor always is 72 ° F, electronic equipment always is below 25 ° C the job, but neither can happen. Stand by sensor as electronic equipment, the working temperature of electronic equipment can produce change, below certain circumstance change exceeds 100 ° C. Change meets this kind of temperature produce negative effect to electronic circuit, especially imitate circuit. Imagine, if you designed perfect ADC, add source of a temperature by it next. Imagine now, temperature source is change, it is hot sometimes, it is warm sometimes. This meeting plays havoc with your ADC function. This is the business that the MCU on the side of ADC is doing. From power of high speed have rendered great service (hot) to bide one’s time, Morpheus or dormancy (not quite hot) , to the property that can forecast is acquired in this kind of environment, need adds temperature to compensate circuit. This will raise dimension and cost, and as compositive as MCU ADC normally won’t indulge this kind is extravagant.

Engineering technology

The 4th challenge is engineering technology. Because the main function of the parts of an apparatus of compositive ADC is MCU, because this used engineering technology is MCU,friendly craft is reasonable. After all, the client needs to pay fee for MCU, and ADC is a peripheral only, the craft that because this is aimed at the peripheral on equipment only,the choice optimizes is no point.

MCU uses design of lesser geometrical appearance technology normally, can offer good digital density and high speed transistor. It is to the advantage of ADC, use such process to will reduce the size of ADC. Craft of small geometry dimension may reduce the size of ADC, but increase considerably as a result of process cost, the totle drilling cost of ADC may increase actually. However, higher chip cost is offsetted by inferior test cost place.

In addition, through limitting the size of usable component in craft, ADC noise can increase, especially thermal noise or KT/C noise. Larger electric capacity is used to reduce thermal noise in ADC design, this is the important design tie of craft of lesser geometry appearance. In fact, the package that on smaller geometrical size place of implementation imitate function needs has challenge sex more on geometry. In addition, the capacitor of lesser geometry appearance can introduce leak, nonlinear and match a question, these problem unlike are controlled in process of bigger geometry form in that way. Transistor also is such. Control of this kind of lack will cause production process change finally, this changes expression for the parameter of ADC function.

Another challenge of lesser geometry craft is 1/f noise. 1/f noise takes dominant place when low frequency, with dc photograph comparing reduces 1/SQRT about (frequency) . Below more high frequency rate, white noise begins dominant 1/f noise, call turn frequency, if pursue,1 is shown. (drama appears early-warning! If want to compensate a technology through using a number (be like average or cross sampling) will improve performance, the value that needs to ensure include white noise and be opposite only is not 1/f noise undertakes sampling. Lesser geometrical craft and older geometrical craft photograph are compared, corner frequency deflection is taller – is apparent taller. This is technology of digital filter wave (be like average or cross sampling) the reason that cannot improve the systematic performance that has frequency of tall 1/f turn, in fact, below certain circumstance, technology of digital filter wave can reduce systematic performance. By nature, it is good to no matter ADC is designed,have many, the limitation of the process will decide ADC realizable function finally.

How these influencing factors affect ADC performance and to how these influencing factor affect ADC performance and affect systematic performance finally?

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