1 overview:

 

Definition: Power Over Ethernet of PoE full name, it is to point to power supply of network of network of aether of 10BASE-T, 100BASE-TX, 1000BASE-T, namely data line and power supply cord are transmitted on same root reticle, its are reliable the distance of power supply is the longest it is 100 meters.

 

PoE power supply system includes PSE of two kinds of equipment and PD, PSE (Power-sourcing Equipment) , basically be the device that uses equipment to have power supply, PD (Power Device) , the device that gets report is used in PoE power supply system.

 

2POE main power supply is characteristic

 

2.1PSE characteristic parameter:

 

(1) voltage is between 44~57V, typical cost is 48V

 

(2) allow the biggest electric current to be 550mA, the biggest electric current that start is 500mA

 

(3) typical job electric current is 10~350mA, overload detects electric current is 350~500mA

 

(4) in carry a condition to fall for nothing, electric current of the biggest need is 5mA

 

2.2PD power social estate

 

Cent of PD power social estate is CLASS 0, CLASS 1, CLASS 2, CLASS 3, CLASS 4, CLASS 5

 

The top job power that CLASS 0 equipment needs is 0.44W ~12.95W

 

The top job power that CLASS 1 equipment needs is 0.44W ~3.84W

 

The top job power that CLASS 2 equipment needs is 3.84W ~6.49W

 

The top job power that CLASS 3 equipment needs is 6.49W ~12.95W

 

The top job power that CLASS 4 equipment needs is 12.95W ~25.5W

 

The top job power that CLASS 5 equipment needs is > 25W

 

Stylist can ask to designate their equipment according to power for specific level.

 

2.3The working process of POE power supply

 

In classification level, PSE will bring to bear on to PD the voltage of 15 ～ 20V, determine the specific level of PD through measuring voltaic volume. In this phase, the power source part of PD will be owed to press a lock to decide (UVLO) circuit is maintained in passive condition, so that switch-disconnector class, till the feature is mixed,classification level is finished. After once classification,be being finished, PSE will offer sum job voltage to PD.

 

PSE should be decorated in a network when power supply carries equipment, process of job of power supply of POE aether net is shown as follows:

 

Detect:

 

Above all PSE can send voltage of a test to give a 24.9kΩ in electric equipment getting with exploring in network equipment in all modular resistor. Test signal begins to be 2.5V, promote 10V next, this will conduce to the loss that impedance of oneself of compensation Cat-5 cable brings. Because this kind of cable is the longest,can amount to 100m. The proper impedance feature that if PSE detects,comes from PD (24.9kΩ) , it can continue to promote voltage. If detect,be less than diagnostic impedance, PSE will not append report for cable. The neat accept diode in circuit of equipment getting report can make sure systematic others does not suffer the interference that checks signal.

 

PD carries equipment classification:

 

Should detect after sufferring report to carry equipment PD, PSE will bring to bear on to PD the voltage of 15 ～ 20V, determine the specific level of PD through measuring voltaic volume. If be done not have besides the resistor that explores the first class,discover other classification circuit, this equipment is become by the definition 0 level. In this phase, the power source part of PD will be owed to press a lock to decide (UVLO) circuit is maintained in passive condition, so that switch-disconnector class, till the feature is mixed,classification level is finished.

 

Begin power supply:

 

Classification after finishing, be in to be able to configure time (be less than 15μs) commonly start period inside, PSE equipment begins from low voltage to PD equipment

 

A) power supply, till provide the direct current source of 48V.

 

B) power supply: The equipment that it is PD offers the dc of stable and reliable 48V, contented PD equipment does not cross the power of 12.95W to use up.

 

C) cuts off the power: When be like PD equipment to disconnect from the network, PSE is met apace (it is commonly in 300 ～ 400ms) stop to be PD equipment power supply, whether does the terminal that repeats check to measure a process to measure wire cable with check join PD equipment.

 

3Brief introduction of module of POE power source

 

Module of this second POE power source uses MAX5969B and MAX5974A chip to come true, power social estate is the POE power source of CLASS 4. The circuit develop of module of POE power source attacks the structure is used stimulate type transformer implementation instead, use stabilized voltage of feedback of transformer former edge and technology of commutate of deputy edge synchronism. Input voltage limits is between 36V~57V, output voltage is in bit firmlier 5V, had had pressure protection, shed the characteristic such as protection too. If the graph shows the principle picture for POE power source 1 times.

 

 

3.1Chip of module of POE power source

 

Chip MAX5969B is the equipment that use phone (PD) offer accord with aether net power supply (PoE) the complete interface of systematic IEEE802.3af/at standard. MAX5969B is offerred for PD detect signal, classification signal and contain pilot of surge electric current switch of compositive segregation power. During producing surge, MAX5969B is in voltaic limitation 180mA less than, till segregation power MOSFET opens the switch after opening completely to be worth to taller current limliting (720mA comes 880mA) . Parts of an apparatus has input UVLO, contain wider sluggish is answered and long cycle disturbs pulse screen, in order to compensate the block sex attenuation of cable of double skeining thread, ensure electrify / during dropping report jam-free transmit. MAX5969B input end can bear the voltage that is as high as 100V.

 

MAX5969B chip character is as follows:

 

(1) compatible at IEEE 802.3af/at

 

(2) 2 class incident classifications

 

(3) interface of the adapter on simple and easy wall

 

(4) 0 classification to 5 class POE

 

(5) 100V is absolutely the biggest rated input

 

(6) electric current of the biggest surge restricts 180mA

 

(7) voltaic limitation reachs 880mA in 720mA during regular job

 

(8) electric current is restricted and lose the protection that return form

 

(9) traditional 36V UVLO (MAX5969A)

 

(10) IEEE 802.3af/at compatible, 40V UVLO (MAX5969B)

 

(11) overheat protection

 

(12) increase medicinal powder hot 3mm×The 3mm, 10 TDFN that cite a base are enclosed

 

If the graph shows the picture citing a base for MAX5969B 2 times, next brief introduction issues every to cite a base.

 

Graph 2 MAX5969B makes crural plan

 

Watch 1 MAX5969B makes crural brief introduction

 

The simple introduction of process of chip MAX5969B job, MAX5969B has 4 kinds of different job pattern:

 

PD detects, PD classifications, mark incident and mode of PD power supply. Detect mode is to be used detect equipment is PD equipment; Classification mode is to use affirmatory power input to be how old; Mark incident is used at 2 class to classification commonly mode detects; Power supply mode is give PD equipment formally power supply.

 

When inputting voltage to be between 1.4V and 10.1V parts of an apparatus enters PD to detect mode; When inputting voltage to be between 12.6V and 20V, parts of an apparatus enters PD to classification mode; Once input voltage to exceed VON, parts of an apparatus enters mode of PD power supply.

 

Detect mode (1.4V≤VIN≤10.1V) :

 

Detect below mode, PSE brings to bear on to VIN 1.4V comes 10.1V limits (most half step grows two voltage that are 1V) , record the voltaic measured value that managed this at 2 o’clock. Next, PSE computation DV/DI joined with ensuring 24.9kΩ feature resistor. Join between VDD and DET diagnostic resistor (RDET) , in order to ensure correct feature detects. Detect below mode, MAX5969B pulls DET low. When input voltage exceeds 12.5V, DET turns into tall block condition. Detect below mode, the most in-house circuit of MAX5969B is in close position, slant buy electric current is less than 10μA.

 

Classification mode (12.6V≤VIN≤20V) :

 

Classification below mode, the power comsumption that place of PSE basis PD needs undertakes classificationing to PD, make PSE can manage power allocation effectively. The 0 definitions to 5 class can know through examining data manual (IEEE 802.3af/at standard was defined only 0 to 4 class, 5 class are used at special requirement) . Join between CLS and VSS an exterior resistor (RCLS) , use at the setting to classification electric current. The electric current that through bringing to bear on to PD input voltage measures PSE to output comes to PSE the level of affirmatory PD. The voltage that brings to bear on when PSE is between 12.6V and 20V when. PSE is used classification voltaic information will ask to undertake classificationing to PD power. Classification the source current of the electric current that electric current includes RCLS to absorb and MAX5969B. The total electric current that so PD absorbs is in the target range of IEEE 802.3af/at standard. When parts of an apparatus is in power supply mode, shut classification electric current.

 

Power supply mode (wake up mode)

 

Rise to owe when VIN press a lock to decide the door to be restricted (when VON) above, MAX5969B enters power supply mode. When VIN rises to VON above, raceway groove of N of MAX5969B open interior keeps apart MOSFET, VSS join comes RTN, in-house surge electric current restricts a setting to be worth) for 135mA (model. The tension that handles when RTN is close to VSS and surge electric current falls to be restricted to surge door the following when, keep apart MOSFET complete open. Once complete open keeps apart MOSFET, MAX5969B changes voltaic limitation for 800mA. Before power MOSFET complete open, power source be in order opens leakage to output (PG) maintains for low n, duration is at least, prohibit in order to be during surge follow-up DC-DC converter.

 

Chip still has the working state of a few other, owe for example press a lock to decide, heat closes source of electrify of protection, wall to adapter detects and work etc.

 

Chip MAX5974A is clamp of limits of wide input voltage, active, controller of voltaic mode PWM, use at controlling aether net power supply (the equipment using phone of PoE) (in PD) stimulating converter. MAX5974A applies to the input voltage limits of general or telegraphic system. Unique circuit design can be in chip MAX5974A not to need the output that stability gains below the premise of smooth Ou.

 

MAX5974A has a lot of character, a few the following and brief introducing:

 

(1) clamp of control of mode of peak value electric current, active, stimulating PWM controller

 

(2) need not smooth Ou can obtain stabilized voltage output

 

(3) 100kHz comes 600kHz but process designing, ±8% shakes pilot switch frequency, but synchronous and supreme amount to 1.2MHz

 

(4) but process designing frequency shakes, support work of frequency of low EMI, enlarge

 

(5) but time of process designing dead band, PWM is soft start, voltaic slope compensation

 

If the graph shows the picture citing a base for chip 3 times.

 

Graph 3 MAX5974 makes crural plan

 

Watch 2 MAX5974A makes crural brief introduction

 

 

3.2 input and output circuit brief introduction

 

Input voltage is taken from the 48V power source at network port, input voltage passes D1 of two commutate bridge, D2, among them D26 is a transient state restrains diode SMBJ54A to use protective input to be pressed too.

 

Output voltage gets after the deputy edge commutate through stimulating transformer instead, because rectification hind is pulsatile voltage is bigger, can add electric capacity of output filter wave after rectification so, capacitance of output filter wave can choose a few large electric capacity to increase parallel connection of a small electric capacity again commonly, arrive since large electric capacity store can mix the action of filter wave, small electric capacity is used high frequency go Ou, paralell connection of a few capacitance can fall output resistor the smallest. Choice of this module POE power source is enclosed 3 times for 1206, the size that hold a cost is the capacitance of pottery and porcelain of 47uF. Stimulate transformer to choose SIR412DP switch to be in charge of implementation active commutate instead, use winding of transformer deputy edge to obtain driving voltage, former edge does not need such transformer degauss circuit perhaps draws circuit, use energy however canal of drive SIR412DP switch, implement synchronous commutate technology. The leakage that switch is in charge of extremely with the source extremely shunt-wound RCD draws circuit, achieve the goal that protects switch canal with the voltage aiguille that will restrain switch to be in charge of leakage source to carry. Although say of MOSFET is one kind approachs the switch valve that accuses profiling, but the canal debuts and be being shut to switch is the parasitism electric capacity that provides to switch charge to will open or be shut, this needs certain drive electricity. Establish ties in drive circuit so the resistor of a 10 ohm.

 

Brief introduction of circuit of 3.3 chip periphery

 

Chip MAX5969B main effect is reflected in just electrify when the chip that uses communication with module of PSE power supply, to each POE power source, chip is indispensable like this sort. Some are so-called on market the often is a 48V only voltage that is POE power source becomes 5V or the voltage of other, in electrify when did not detect, classificationed phase, this to be danger sufferring for electric equipment. Detect the common method that power source is POE power source or blame POE power source is, take avometer to measure power supply foot, 4 be network port commonly, 5, 7, 8 feet, if port outputs the 48V voltage that is stability, this shows power source of POE of power source dispute; If measure voltage beats in 2~10V, explain power source is POE power source, voltage beats is undertaking detecting to PD end.

 

The VDD of chip MAX5969B is power source cites a base, the has 0.1uF secondhand electric capacity of VDD and VSS uses side road, capacitance C7 and C13 are used store can mix filter wave.

 

The resistor that DET receives a 24.9K arrives Vin, this resistor is diagnostic resistor cannot be changed, if changed the block value of this resistor, job of POE power source will be abnormal.

 

VSS cites a base is the ground end after receiving input commutate to pass, VSS interior is in charge of through MOSFET and the ground connection end of transformer former edge is linked together. Be in when chip detect with classification level moment, in-house MOSFET is in disconnecting condition.

 

RTN brings a foot to receive the ground end of transformer former edge, it is the power ground end of succeed DC-DC.

 

WAD cites a base is to be used receive power supply of power source of the adapter on the wall, the POE power source of this module did not use the adapter on the wall, but also considered when circuit is designed, just did not solder relevant parts of an apparatus.

 

PG brings crural interior is MOSFET leakage pole output, before the MOSFET complete open in chip interior, PG maintains for low n, of PG termination MAX5974A make can be carried, reason PG is in during maintaining low n, MAX5974A is to be in do not work condition. The capacitance bypass of 1nF is received outside PG.

 

2EC cites a base is 2 class incident detects foot, this module was not used go up directly pull 100K resistor to arrive RTN, in case when PD equipment is in 2 class status, 2EC brings a foot to have a return.

 

CLS cites a base is to classification resistor input cites a base, CLS brings a foot to receive how old resistor is carried to VSS ground, decided POE power source is to be in which one class. When can examining data manual to know to should receive 30.9 ohmic resistor, PD equipment setting is condition of 4 class circuit, that is to say the power that PD equipment wants to use up 12.95-25.5W.

 

Chip MAX5974A is chip of a power source government, chip interior is compositive a lot of functions, the periphery circuit that should recommend according to chip data manual only builds a method, need to configure some of capacitance and resistor simply to be able to design module of a power source very quickly only. Will introduce what chip makes crural periphery circuit every to build next, the understanding chip with come better and stimulate formula switch power source instead.

 

DT cites a base use time of setting dead band, as a result of MAX5974A this chip offerred output of two grid drive, one is NDRV advocate output of switch grid drive, it is to use drive transformer former edge is to be in disconnect condition still comes out to put through condition. One is AUXDRV it is to use deputy edge switch to provide the drive signal that realizes synchronous commutate, as a result of transformer former edge switch is in charge of and switch of transformer deputy edge is in charge of cannot enough at the same time open, although NDRV and AUXDRV are of complementary output, but debut as a result of what switch is in charge of itself and involve a process not ideal, there is certain time delay when debut and closing, this need adds reason proper dead band time. Time of the setting between dead zone time comes in 40ns between 400ns, the setting of dead band time is a resistor is received to be carried to RTN ground outside passing, specific and how old resistor is installed how long dead band time, can get through following formula:

 

 

This module chooses =27KW, dead band time is 108ns, already enough to time of this dead band, because the defer time of use MOSFET is in 40ns less than.

 

DITHER/SYNC brings a foot to be added for frequency shake process designing synchronous perhaps join cites a base. Join between DITHER/SYNC and RTN ground a capacitance, join between DITHER/SYNC and RT a resistor, can be opposite inside limits the switch frequency of converter is added tremble, reduce EMI thereby. The current source that particular procedure is DITHER/SYNC place charges capacitance C14 with 50uA electric current to 2V. After achieving this to nod, c14 with 50uA electric current discharge comes 0.4V. Capacitance charges and discharge can generate wave of a triangle on DITHER/SYNC, peak value is 0.4V and 2V respectively, normally the circumstance falls, frequency is 1KHZ. The computational formula of capacitance C14 is:

 

 

This module chooses C14=10nF, join resistor formula is as follows among them:

 

 

Among them, %DITHER shakes a quantity to add, express to be the per cent of switch frequency. RDITHER the setting is 10 RRT, produce ±10% shake. Second resistor did not solder in this module, but also obligate the position, when needing can solder last resistor.

 

RT cites a base is join of resistor of switch frequency process designing. Reach join RTN ground, frequency of setting PWM switch is between 100KHZ~600KHZ. Can consult as follows formulary:

 

 

For the switch frequency of PWM wave, this module power source chooses to be 29.4K, that is to say switch frequency is 296KHZ.

 

FFB cites a base is frequency is folded return the door to be restricted process designing input. From FFB a resistor join reachs RTN ground, the setting outputs door of average electric current to be restricted. Under this in a limited time, converter folds switch frequency return to its the 1/2 of original value. When this join that cite a base reachs RTN ground, ban fold with frequency return a function. The function of this foot is to switch frequency is reduced when carrying gently, in order to reduce switch loss, improve converter efficiency, the action of managing the sources of energy. Connective resistor computation can get through following formula:

 

 

Among them, RFFB is the resistor between FFB and RTN ground, ILOAD(LIGHT) sparks to carry a condition gently to fall frequency loses returned electricity, RCS is in CS and RTN ground for join between detect resistor, IFFB gives the electric current to RFFB for FFB source (30µA, the model is worth) . This module is linked together through a 0 ohmic resistor.

 

COMP cites a base is to cross guide amplifier output and PWM comparator are inputted. Use n converter changes COMP to low n, join to PWM comparator input instead. This cites a base is to use improvement annulus road stability, make ripple of output voltage stability small. This module is used 2 model the stability that network of annulus road compensation will come to realize annulus way, specific the circuit that the C15 in be being pursued by the principle, C16 and R10 make will finish.

 

FB cites a base is to cross guide amplifier is inputted instead. MAX5974A includes to contain sampling – the in-house error amplifier that maintains an input. The inphase input join of error amplifier comes in-house and fiducial, inputting instead offer feedback. Gain of tall open loop and unit gain bandwidth can realize good closed circuit bandwidth and transient state to answer. Use transformer of computation leaving type the output voltage of former edge coupling:

 

 

Of MAX5974A for 1.52V, turn over voltage of make a present of to be able to get through following formula among them:

 

 

Of this module

 

 

The feedback voltage of this module is taken from the voltage at coupling of transformer former edge, and the uses TL431 and PC817 program that did not use a convention will obtain feedback voltage to make output voltage to stabilize thereby, but when circuit is designed also obligate TL431 and the plan that PC817 feedbacks will gain output voltage stability. The voltage of coupling of transformer former edge still has an action to offer power source to input to MAX5974A chip namely. Can change output voltage through installing the voltage of feedback part, can by following formula knowable:

 

 

Among them, VOUT is output voltage, NC/NO is coupling output and advocate the v/LIT all over the ground number that exports winding is compared. The v/LIT all over the ground number of the choice is equaler than wanting to make UVLO of VCOUPLED prep above closes report (7.35V, maximum) amount to certain abundant quantity, this abundant quantity spans by “ ” drops what electric place needs to hold time decision.

 

SGND brings a foot to bring a foot to join to RTN ground for signal ground.

 

CSSC brings a foot to contain slope to compensate the electric current of the input to detect. Join the resistor between CSSC and CS is used at setting slope compensation. Parts of an apparatus produces voltaic brae in CSSC end, its peak value occupies sky comparing to be in the oscillator 80% when amount to 50μA. Join in CSSC the exterior resistor to CS changes brae of this electric current to but process designing slope compensates amplitude, add to electric current to detect signal, use at stabilizing operating ring of mode of peak value electric current road. Slope compensates the metabolic ratio of signal to give out by next type:

 

 

Among them, m compensates the metabolic ratio of signal for slope; RCSSC is mixed in CSSC for join the resistance between CS, use at setting metabolic rate; FSW is switch frequency. This module chooses resistor R18 to be 4.02K.

 

CS cites a base is electric current detects input. The electricity that is used at average electric current detects and chasing periodic current limliting detects join. Peak value current limliting touchs hair voltage to be 400mV, retrorse current limliting touchs hair voltage to be – 100mV. Join in MOSFET of N raceway groove the electric current between source pole and RTN ground detects resistor (the RCS) in representative application circuit is used at setting current limliting value. The voltage of current limliting comparator touchs hair n (VCS-PEAK) is 400mV. Use value of RCS of computation leaving type:

 

 

Among them, IPRI is the peak value electric current of transformer former edge, this electric current also sheds classics MOSFET. When this electric current (detect through electric current resistor) the voltage of generation exceeds current limliting comparator the door in a limited time, MOSFET driver (NDRV) electric conductance is stopped to understand cycle inside 35ns() . The R21 of choice of current limliting resistor of this module, R25 is 1206 enclose block value to be 0.25 ohm. Use network of a small-sized RC, to detecting the forward position aiguille on weaveform has additional filter wave. The horny frequency setting of filter wave circuit comes in 10MHz between 20MHz. This module chooses R26 to be 330pF for 499 ohm and capacitance C24.

 

PGND brings a foot to receive RTN ground end for power ground. PGND is the loop of switch electric current of grid driver.

 

NDRV brings a foot to give priority to output of switch grid drive. This foot is received through a little resistance advocate the grid of switch canal SI7450 comes drive SI7450. The frequency that this foot outputs is 296KHZ.

 

AUXDRV makes vice of crural PMOS active output of switch grid drive. Artery of drive of AUXDRV Yi Ke develops transformer, use at synchronism to stimulate application instead. This brings foot and NDRV to be complementary output, this module is to use coupling of transformer deputy edge to come canal of switch of drive output commutate, this foot did not use reason, be in impending condition, but when be being designed, also included the periphery circuit of its drive, need comes with its when drive outputs rectification switch to be in charge of, can get on relevant circuit solder, but cannot have transformer at the same time coupling drive mixes deputy edge to exist with AUXDRV drive.

 

VC cites a base is input of converter power source. IN has wide UVLO sluggish to answer, can come true efficient power source design. When should using the UVLO n that makes can input EN to set power source, join between IN and PGND diode of a neat accept, ensure VIN always is by clamp to under its 26V of absolutely the biggest rating. The power source input of this module takes the voltage from coupling of transformer former edge, after the voltage of edge coupling passes D10 commutate, transformer gives the VC of chip formerly, receive between chip VC and RTN ground 22V stabilized voltage is in charge of D28 and capacitance C4 and C37. Among them as shunt-wound as diode D10 RC circuit is to be used, diode prevents to have the impact of big electric current in electrify instant, pass RC circuit first in electrify instant electric current, and protective diode D10.

 

EN brings a foot to make can be inputted. When EN report depress at VENF, grid driver is banned to use, parts of an apparatus is in mode of UVLO of low power comsumption. When VENR of EN voltage prep above, other of examination of parts of an apparatus makes can condition. Make can input EN to be used at making can or ban with parts of an apparatus. EN join comes when IN, parts of an apparatus holds the job from beginning to end. When EN join reachs the ground, can ban with parts of an apparatus, reduce voltaic loss to 150μA. The EN end of this module joins through the resistor of a 100K VC is carried, EN end also brings a foot to be linked together with the PG of MAX5969B, use MAX5974B in order to be used at be being banned before power supply.

 

DCLMP cites a base is before make a present of is the biggest hold sky comparing grip process designing input. Join between DCLMP of voltage of input power source and GND voltage divider of a resistor. What the voltage on DCLMP installs converter is the biggest occupy sky comparing (DMAX) , this value and voltage of input power source become inverse ratio, so MOSFET still is in during producing transient state accept protective position. Can get dividing approaching resistance by following formula:

 

 

This module

 

 

It is the R8 that the principle pursues medium and R7 respectively.

 

 

It is soft that SS cites a base join of capacitance of the process designing that start. Join between SS and GND a capacitance, install the soft cycle that start. This capacitance returns those who decide belch mode current limliting to restart time. The resistor between SS and GND also can be used at the setting under the DMAX of 75% . Join between SS and GND CSS of a capacitance, set the flexible time that start. The oscillator during VSS control is started occupies sky comparing, make occupy sky comparing to increase smoothly to be worth to its stable state. Press form calculation CSS is worth:

 

 

Among them, ISS-CH (10μA, typical cost) for soft the CSS charging current during starting, TSS is the flexible starting time of the setting. Join through be between SS and ground resistor, can set the voltage on SS for under 2V. VSS calculates as follows:

 

 

This module power source chooses capacitance C3=22nF, resistor R35=1MW.

 

3.3 transformer and the alternative that switch provides

 

The success that stimulates transformer design instead very big one part should depend on the stand or fall that transformer designs, different circuit develop attacks the structure has different computational formula, but basic it is to be based on AP law to design transformer. Some do power source to have the person of rich experience to often can design very good transformer, and had done not have much consideration when design. The transformer parameter that through formulary place computation comes out often has transformer to circle only than, core of line means, transformer magnetism and transformer framework, wanting to design a good transformer to have these only is insufficient, consider transformer even wind a way, how transformer is circled is an important parameter. Because different transformer circles law place to get the transformer that arrive,final performance has very big difference, the transformation that uses sandwich to wind a way for instance has inferior leakage feeling. Anyway the design of transformer has too much thing to need a consideration, if what circle transformer performance is poorer, can adjust v/LIT all over the ground number, change to circle a law to perhaps change core of a transformer magnetism to wait appropriately.

 

This module is chosen outside bought transformer Sumida T225, because the switch frequency of this module is taller, also ask somewhat to transformer dimension, transformer is bought outside deciding through discussing for many times and not be oneself circle. Discover through the test this transformer function is very good, transformer is in burden when without what unusual happen, output voltage is normal also.

 

The switch canal option that washs formula switch power source instead should satisfy leakage source to be able to bear input voltage is 1.5 times of the voltage that coupling of transformer deputy edge comes over extraer, when ability makes sure switch canal is closing by puncture. Switch is in charge of leakage source to also want to be able to have shed the input electric current of 2 times, ability assures switch canal to because cross conductance,won’t cause damage. The loss that switch runs has certain proportion in loss of module of whole power source, general meeting select switch canal rises and the MOSFET with short decay time, make sure in switch the canal guides the part of the voltage in the period of time that connect and shuts and voltaic overlay is little, reduce the loss that switch runs.

 

PDN of 4 power source and ripple noise

 

PDN of 4.1 power source

 

Test of noise of power source ripple is a more complex test difficult problem, the outcome that different method measures is different, although same different person test also meets kind of test method commonly as a result existence difference.

 

To terminal kind product, no matter be CPU, GPU, DDR, its chip interior has by tens of thousands transistor, the different circuit inside chip needs different power source power supply, common Vcore, Vcpu, Vmem, VIO, Vgpu, Vpll waits, these power source have power supply of module of DC-DC power source, also have power supply of module of LDO power source, unified will manage by PMU.

 

If the graph is shown 4 times, for the PDN graph of chip, the road of power supply annulus of chip begins from VRM of stabilized voltage module, to the power source network of PCB, the Ball of chip cites a base, the power source network that chip encloses, arrive at Die finally. When chip the job is when different load, VRM cannot answer the demand that load changes quickly to electric current in real time, on voltage of chip power source generation declines, produced power source noise thereby. To the VRM of module of switch power source, power source oneself can produce the power source ripple that agrees with switch frequency, from beginning to end overlay is outputted on power source. To power source noise, need is in enclose, use on PCB go Ou capacitance, design reasonable power source ground level, final filter goes power source noise. To power source ripple, need increases BULK inductance or BULK capacitance.

 

Graph distributinging network of 4 chip power source (PDN) sketch map

 

To design of board class PCB, after frequency achieves certain frequency, because take the effect of the ESL of the line, ESL of capacitance, already cannot filter goes high frequency noise, industry thinks PCB can handle the noise of 100MHz less than only, more high-frequency noise need is enclosed or Die is solved. Check to noise of board class power source accordingly, the oscillograph of above of use bandwidth 500M is enough. Usually, the bandwidth of oscillograph is bigger, low a confusion of voices also can rise subsequently, the bandwidth limitation of the oscillograph when because this suggests,checking power source is 1GHz.

 

Ripple of 4.2 power source and power source noise

 

Power source ripple and power source noise are an easier and promiscuous concept, following graphs are shown 5 times, blue weaveform is power source ripple, gules weaveform is power source noise. The frequency of power source ripple is switch frequency base wave harmony wave, and the ripple of frequency composition prep above of noise, be by board go up a lot of element such as the electromagnetism radiate between plane of the parasitism inductance of network of the transient state electricity that the switch switch of I/O of chip high speed produces, power supply, power source and ground level arises. Accordingly, power source output is measured to be ripple in PMU side, and carry in SINK (end of chip of bad news report, wait like AP, EMMC, MODEM) those who measure is power source noise.

 

Graph sound spectrogram of a confusion of voices of ripple of 5 power source

 

When power source ripple is measured, limitative oscillograph bandwidth is 20MHz, the undee peak peak value that measures output of PMU power source can power source ripple. After because PMU chip is in,the design is finished, chip plant chamber of commerce does laden test, test PMU outputs the ripple circumstance of power source when different load, because this is in terminal kind on product board, not necessary the test that doing this side, manual of PMU of ripple size reference can.

 

When power source noise checks, test site is put in SINK to carry, because SINK carries working rate to be in mostly above of a few MHz, because setting of this oscillograph bandwidth is complete frequency paragraph (highest for oscillograph bandwidth upper limit) , test site should stand by the power source that tests chip to cite a base as far as possible, if be put in many power source to cite a base, should choose to be apart from PMU farthermost end that cites a base. Power source noise follows PCB layout wiring, the position of the position of DECAP capacitance is relevant, at the same time power source noise affects the EMI of the working status of CPU and veneer, terminal kind product board need checks power source noise to every veneer.

 

5 common ripple noise test program

 

5.1 ripple noise checks main demand

 

The working frequency of chip is at present taller and taller, working voltage is lower and lower, working electric current is bigger and bigger, noise requirement is more slashing also, it is with the CORE nucleus of MSM8974 exemple, voltage is 0.9V, electric current is 3A, when requirement 25MHz, communication PDN impedance is 22mohm, power source noise asks to be in ±33mV less than. To DDR3 chip, noise of requirement VREF power source is in ±1% less than, be like 1.5V power supply, criterion noise peak peak value is not more than 30mV.

 

 

The power source test of this kind of low noise has a challenge very much, those who affect its to measure accuracy is main when to have as follows:

 

(1) the bottom a confusion of voices of oscillograph passageway;

 

(2) the resolution of oscillograph (the ADC digit of oscillograph) ;

 

(3) oscillograph is perpendicular scale is the smallest value (quantify an error) ;

 

(4) probe bandwidth;

 

(5) probe GND and signal measure pilot interval twice;

 

(6) the setting of oscillograph passageway;

 

When checking power source noise, the requirement is as follows condition:

 

(1) need issues ripple of test power source in serious laden case;

 

(2) when checking power source ripple should be in lock of frequency of CPU, GPU, DDR surely highest frequency;

 

(3) test site should be apart from the position with farthermost PMU in SINK end;

 

(4) the BALL that checks a dot to should stand by chip;

 

(5) bandwidth setting is complete frequency paragraph;

 

(6) oscillograph bandwidth is more than 500MHz;

 

(7) perpendicular perhaps scale has been the 2/3 above that noise weaveform takes whole screen the least value;

 

(8) the return circuit between probe ground and signal is the shortest, inductance is the smallest;

 

(9) test time is more than 1min, above of sampling time 1ms, sampling leads 500Ms/s above;

 

(10) ripple noise sees Pk-Pk value, pay close attention to value of Max, Min;

 

5.2 connect filter character high to analyse

 

Oscillograph has AC and DC means of two kinds of coupling, when using AC coupling, if circuit of its interior equivalent pursues 6 are shown, c is the capacitance that separate a value, r is opposite for terminal ground impedance, vi is input signal, vo is measure signal, the cut-off of filter frequency is

 

 

For signal frequency, have:

 

 

Graph 6 after increasing the electric capacity that separate a value connect filter equivalent circuit high

 

Express the frequency dot of correspondence of the 3 different capacitance that separate a value

 

Coupling of DC of 5.3 passive probe checks

 

Use test of coupling of passive probe DC, oscillograph interior installs the coupling that it is DC, coupling impedance is 1Mohm, right now the ground wire of passive probe is received advocate board ground, line is recieved measure power source signal. This kind of measurement technique can be measured except the ripple of power source noise beyond DC.

 

If the graph is shown 7 times, when using common crocodile to place probe, because the ground is mixed,wait for measure the annulus way between signal too big, and the IC chip that probe explores a dot to stand by high speed to move, near field radiate is bigger, can radiate of noise of a lot of EMI arrives in probe loop, make the data of the test not accurate. To improve this kind of condition, recommend when checking ripple with passive probe, use the probe in right graph, twine ground signal the foot is brought to go up in signal, be equivalent to be being put in inductance of an annulus road between the ground and signal, be equivalent to tall block to high frequency signal, restrain the high frequency noise that produces as a result of radiation effectively. More moment, the person that the proposal checks uses method of the 3rd kind of test, circle an enamel-insulated wire on probe, receive the solder of enamel-insulated wire next advocate on board ground network, mobile probe goes checking noise of ripple of each power source. At the same time passive probe asks to use 1:1 as far as possibleprobe, put an end to use 1:1The probe of 0.

 

Graph ground wire of 7 passive probe two kinds of processing techniques

 

To oscillograph, if perpendicular scale is XV/div, oscillograph is perpendicular direction is 10div, full span is 10xV, oscillograph sampling AD is 8, quantify an error to be 10x/256 V. For example power source of a 1V, noise ripple is 50mV, if want to show this signal, need installs perpendicular scale to be 200mV/div, quantify an error to be 7.8mV right now, if pass dc 1V Offset take out, show ripple noise signal only, perpendicular scale setting is 10mV can, right now quantify an error to be 0.4mV.

 

Use test of coupling of passive probe DC, oscillograph installs as follows:

 

(1) 1Mohm termination matchs;

 

(2) DC coupling;

 

(3) complete bandwidth;

 

(4) Offset setting is power source voltage;

 

Coupling of AC of 5.4 passive probe checks

 

Use coupling of passive probe DC to need to install Offset, to the circumstance with power source not stable voltage, offset setting is unreasonable, can bring about the signal that shows on screen to exceed span, choose AC coupling right now, use inside of buy lay aside circuit to come filter goes shedding weight continuously. To most oscillograph, can be like next parameter, the setting is AC coupling, the is 10Hz above noise ripple that measures right now.

 

Graph frequency of means of two kinds of coupling nods 8 oscillograph

 

Use test of coupling of passive probe AC, the setting is as follows:

 

(1) 1Mohm termination matchs;

 

(2) AC coupling;

 

(3) complete bandwidth;

 

(4) Offset setting is 0

 

5.5 coaxial lines are peripheral lie between coupling of Europe of straight capacitance DC50 to check

 

Because the bandwidth of passive probe is inferior, and mains switch noise is in commonly 100 MHz above, at the same time power source internal resistance is in Europe of hundreds of fine long hair commonly less than, the passive probe that chooses tall block 1Mohm reflexes a phenomenon to generation of high frequency meeting, because this can choose replace passive probe with coaxial line, right now setting of oscillograph termination impedance is 50 Europe, match with photograph of coaxial line impedance, according to transmission line theory, power source noise does not have reflection, think to measure an outcome right now the most accurate.

 

Use the measurement technique of coaxial line, the most accurate is to use DC50 Europe, but major oscillograph in the Offset when DC50 Europe the biggest voltage is 1V, the measurement that cannot satisfy major power source asks, and when impedance of oscillograph interior termination is 50 Europe, do not support AC coupling, the buy outside needing accordingly an AC capacitance, if the graph is shown 9 times, when value of series connection capacitance is 10uF, the basis is expressed 3 can see, right now OK and accurate test arrives the ripple noise signal of 2KHz above.

 

Graph DC50 of 9 coaxial lines surveys a plan

 

Coupling of Europe of AC1M of 5.6 coaxial lines checks

 

Because be centered in 1MHz less than mostly from the noise of power source ripple that PMU comes out, if use the buy outside coaxial line DC50 to lie between straight capacitance measurement technique, loss of weight of low frequency noise is relatively severe, the measurement technique that because this converts,the graph shows 10 times, use coaxial line to transmit signal, oscillograph setting is AC1M, although exist,reflex so, but reflection signal course is longer CABLE line is folded return after transmitting, the influence is finite, oscillograph collects voltage value to be able to think to still can be consulted on R2.

 

Graph AC1M of 10 coaxial lines surveys a plan

 

To avoid to reflex, the interface that receives oscillograph in coaxial line is in termination resistor of a 50ohm, make oscillograph inputs impedance and impedance of Cable string characteristic to match.

 

Graph AC1M of 11 coaxial lines is measured improve a plan

 

5.7 difference assign test of coupling of DC of capacitance of the buy outside probe

 

Because the probe ground of oscillograph and housing ground pass a small electric capacity to be received together, and the housing ground of oscillograph is received together through trigonometry outlet and earth again, in the lab, almost all facilities land are received together with the earth, if the graph is shown 12 times,oscillograph interior ground wire receives a standard, disturb a problem inextricabilitily because of two kinds of methods that introduce above this, to solve this problem, need introduces float ground oscillograph to perhaps differ minute of probe.

 

Graph ground wire of 12 oscillograph interior receives a standard

 

If the graph is shown 13 times, the cent that it is difference receives a standard, because differ minute of probe to be active probe, outside buy differential amplifier, can will wait for measure signal to be received through needing minute of kind, make the ground of oscillograph is mixed wait for measure a ground to be kept apart, achieve float ground result. But the probe that need branch is in oscillograph is in-house can DC50 Europe coupling, and Offset is the biggest do not exceed 1V commonly, because this need is on poor cent probe,series connection lies between straight capacitance. The CMRR that using the key when the probe that need branch is measured is probe wants enough big, such ability are restrained effectively in all modular noise

 

Graph coupling of DC of capacitance of the buy outside the 13 probe that need branch receives law sketch map

 

5.8 difference assign test of coupling of probe attenuation DC

 

When coupling of DC of capacitance of the buy outside using the probe that need branch, same existence ends the problem of frequency, metrical outcome is met loss heft of a few low frequency, to solve this problem, can distinguish difference probe attenuation 10 times, oscillograph can take the voltage cost that collects 10 show come, setting of this moment Offset also can magnify 10V, can satisfy terminal kind the volts d.c. of the product slants buy.

 

Graph test of coupling of DC of attenuation of the 14 probe that need branch receives law sketch map

 

Voltage of module of 6 power source checks

 

Because this module is POE power source, the input tension that the test uses is taken from at net mouth, module of PSE power supply is met and this module undertakes handclasp corresponds first, PSE equipment is certain from the back what what receive is PD equipment hind, just give PD equipment power supply. If the graph is shown 15 times,be equipment of a PoE SWITCH.

 

Equipment of graph 15 PoE SWITCH

 

If the graph is shown 16 times,be this module circuit, circuit is grown make an appointment with 6.2cm, bounty makes an appointment with 2.65cm, lofty make an appointment with 1.5cm.

 

Module of power source of graph 16 POE

 

Because give POE power supply,carry net affidavit electricity, this module does not have special design port of a network comes to power supply, use “ hardware however 100 thousand why the development that ” offers board, this is developed board be to use process designing, belong to industry to hold a development board that study uses concurrently, can use development board to realize the Wifi, GPRS, blue tooth, use that strings together the function such as mouth, LORA, POE, reason chooses this development board to realize network port power supply directly. If the graph is shown 17 times,be port of network power supply.

 

Graph module of power supply of 17 networks port

 

6.1 inputs voltage is measured

 

The graph shows the tension that port inputs to measure in POE power source after passing to pass network port 18 times, the oscilloscope that uses this is oscillograph of number of SDS1000X-C of vessel positive shop sign.

 

Graph 18 inputs voltage is undee

 

Input voltage also has certain ripple, the graph is shown 19 times even if input the ripple of voltage, can see ripple is smaller still, it is the ripple limits that can accept.

 

Graph ripple of 19 inputs voltage checks

 

6.2 output voltage is measured

 

This module output voltage should be 5V output, but because stabilize voltage very hard all the time,be in 5V is changeless.

 

The graph is shown 20 times even if output voltage checks, see from inside avometer, output voltage is in 5.1V.

 

Graph 20 output voltage checks

 

Outputting voltage also have ripple, the graph is shown 21 times even if output the ripple test pattern of voltage.

 

Graph ripple of 21 output voltage

 

From output ripple can see, this ripple is in inside acceptable range.

 

7 summary

 

Article archives is brief the ABC that introduced POE power source, and whole circuit chip and component type selecting, the introduction of circuit principle. The generation of power source ripple and the introduction that check a method, the test equipment of POE power source introduces, and the measurement that inputs output voltage.