[introduction] MOS transistor is in scale down, raise integrated circuit with limit ground inside enclose density. This brings about oxide ply decrease, reduced the threshold value tension of MOS parts of an apparatus then. Below inferior threshold value voltage, leakage current becomes very big and conduce to power comsumption. The leakage current that this is all sorts of types in why understanding MOS transistor is crucial.

MOS transistor is in scale down, raise integrated circuit with limit ground inside enclose density. This brings about oxide ply decrease, reduced the threshold value tension of MOS parts of an apparatus then. Below inferior threshold value voltage, leakage current becomes very big and conduce to power comsumption. The leakage current that this is all sorts of types in why understanding MOS transistor is crucial.

Before we try to understand all sorts of leakage current part, let us review the idea of MOS transistor first. This will help us know this subject better.

Review MOS transistor structure

MOS transistor structure is mixed by metal, oxide semiconductor structure (call MOS accordingly) composition.

Consider transistor of a NMOS, it has P underlay and N+ to diffuse trap regards leakage as the extreme child with source extreme child. Oxide layer is made by SiO 2, grow in leakage extremely and the raceway groove upper part between source pole. The polycrystalline silicon that bar extreme adulterates by N+ or aluminium are made.

Graph 1.  The airscape of NMOS transistor. All pictures come from SM Kang, y. Leblebici, CMOS number integrated circuit, TMH, 2003, the 3rd chapter, 83-93 page

In without slant below buy condition, leakage pole / source pole and the Pn form that underlay interface handles are to slant reversely of buy. Of dynatron if the graph is shown 2 times,can take a picture.

Graph 2.  Without slant of buy NMOS transistor can take a picture

If what you see, the proper motion of Fermi energy level of metal, oxide and semiconductor is right neat. As a result of oxide – the voltage drop that semiconductor interface is in, si can exist in the belt bend. The direction of buy electric field is inside arrive again to oxide from the metal semiconductor, the way of the direction of voltage drop and electric field is opposite.

This kind of voltage drop is happen as a result of the result function difference between metal and semiconductor (partial voltage drop happens on oxide, the others voltage drop happens on Si-SiO 2 interface) . Result function is the energy that the electron escapes to need to free space place from Fermi energy level. You can understand concerned MOS transistor to be able to be taken in this paragraph of video in Jordan Edmunds pursue and can carry bent more message.

Accumulate

Next, hypothesis grid has negative voltage, and the source of leakage pole and underlay ground connection extremely. Because lose voltage, the cavity in underlay (majority carries stream child) be attracted the surface. This kind of phenomenon is called accumulate. The minority in substrate carries stream child (electron) be pushed to return substrate in. Give out below corresponding can take a picture.

Graph 3. Of the NMOS transistor that bar extreme negaive electricity presses can take a picture

Because the direction of electric field is,arrive again to oxide from semiconductor metal, because this can be taken,bend to opposite way. Additional, note the change of Fermi energy level please.

Extinct area and extinct area

Or, consideration grid voltage just is more than 0. Hole is returned by repulsion in underlay, any mobile phone load in the passageway flow child by extinct. This kind of phenomenon is called extinct, meeting generation slants than notting have the wider extinct area below the condition.

Graph 4.  The extinct area in NMOS

Graph 5.  Graph 4 in the photograph of NMOS extinct area should take a picture

Because electric field is,arrive again to oxide from the metal semiconductor, because this can be taken,bend downward.

The earth’s surface inverts

If raise the positive electricity of grid to press further, criterion the minority in underlay carries stream child (electron) be attracted raceway groove surface. This kind of phenomenon calls the surface to invert, the grid voltage when the surface just inverts calls threshold value voltage (Vth) .

Graph 6.  The surface of NMOS transistor inverts

Graph 7. Graph 6 in the photograph of NMOS transistor should take a picture

The electron is in source pole is mixed form between leakage pole conduct a passageway. If leakage pole voltage increases from 0 potential subsequently, criterion leakage pole electric current (Id) begins to be in source pole is mixed flow between leakage pole. Can take bend downward further and in semiconductor – oxide interface place bends.

Here, ask for Fermi energy level to be less than the Fermi energy level of P underlay originally. This supported such point of view, be in namely the surface, semiconductor is N model (the picture can be taken in what N profile expects in, the energy level that asks for Fermi energy level originally under almsgiver energy level) .

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