Of 1 ideal match

 

The radio frequency front of communication system needs impedance to match those who will ensure the system is effective to receive commonly and blast off, in the wireless communication system of net of couplet of industrial other people, the country has firm demand to launching the size of power, be like not prep above + 20dBm; If cannot be accomplished,match goodly, with respect to the communication space that can affect a system.

 

Circumstance of optimal of radio frequency front is a source transmission line and end, laden end are 50Ω , if pursue 1. But such situation is general nonexistent. Although circuit is emulated in designing a process,pass, in the board plant process that make, wide, transmission line and ground level clearance mix the line board error of thick metropolis existence, solder of general meeting obligate dish debug use.

 

Graph the impedance of 1 ideal matchs

 

2 cause recommend the reason with circuit big error with chip manual?

 

The engineer that pursues RF circuit design has had such experience, when making a distribution way, develop of the S parameter that gives according to data manual, circuit attacks structure, yuan the extraction of parts of an apparatus is worth undertake designing, the difference on the result that end up with and manual is very big. Is this why?

 

Its are main the matter is right for radio frequency circuit, “ lead ” is lead no longer, have diagnostic impedance however. If the graph is shown 2 times, radio frequency transmission line regards as the network that forms by resistor, capacitance and inductance, right now need undertakes an analysis with distributinging parameter theory, reference material [4][7] .

 

Graph model of 2 transmission line

 

The line of diagnostic impedance and line is broad (W) , wire is thick (ply of layer of T) , medium (H) and medium constant (ε) is concerned. Its computation formula is as follows:

Can know by formula, diagnostic impedance and medium layer ply become direct ratio, understandable jump over for insulation ply thick, the resistance that signal crosses its and ground connection layer to form loop place to encounter is greater, impedance value is so greater; With medium constant, line wide with the line thick into inverse ratio.

 

Because of the application of chip setting differs, although circuit design is same, but the PCB of the design suffers the sort of structural dimension, parts of an apparatus, effect that puts the element such as the position, can cause board, board of thick, wiring different, cause the change of diagnostic impedance. When the parameter that gives when we or manual of continue to use undertakes matching, can not accomplish good impedance to match, the case with the result bigger error that the result that natural conference appears to check actually and manual give.

 

Although we cannot copy all parameter of chip manual circuit completely, but can consult among them develop attacks structure, be like π model, T or L etc. How should we debug those parameter next then?

 

Of 3 convention debug a method

 

After the PCB that finish is designed, enter debug a process, some engineers are spellbound to this process lose one’s head, do not know this how proceed with. Some engineers can return data manual, solder the parameter that manual offers to PCB directly, observe through spectrum appearance power is outputted, if do not accord with expectation to be worth; Adjust among them capacitance and inductance, change to perhaps be moved greatly small, next solder returns PCB to go up, ceaseless iteration, till output the value accords with expectation.

 

Because this kind of method cannot be informed the impedance that parameter distributings on PCB board, can keep only solder change parameter is debugged, bring about efficiency very low, and do not suit to debug the impedance that receives link to match.

 

Whether do 4 have more effective debug a method?

 

If we can know to the impedance of parameter distributings on PCB board, can pass Smith round figure undertakes having occupying but the impedance of abide matchs, reduce meaningless parameter attempt.

 

The impedance of distributinging parameter has two kinds of methods to be able to obtain:

 

● uses emulation software to build a model to emulate, but build a model to need to know the condition such as material, dimension, structure, its workload no less than debug directly; Although can build a model, how to make sure its accuracy also is worth to observe and study;

 

● uses network analyzer to be measured directly, this method intuitionistic and the result is accurate.

 

Introduce how to get diagnostic impedance directly through net cent below.

 

Next graphs 3 it is to debug with match circuit reference to pursue, comprise by switch of chip module, radio frequency and antenna. Regard 50Ω reference point as end of output of radio frequency switch, receive network analyzer to measure transmission line to arrive to the impedance of aerial and transmission line respectively here the impedance of chip port. Through matching later, the hope looks toward aerial direction from this bits is 50Ω and past chip direction looking also is 50Ω .

 

As 50Ω reference point basically has two respects regard here:

 

● the place is carried to aerial is the collective link that receive and launchs, need to match only, also considered aerial the influence of impedance at the same time; To chip end parts is receive and launch link, need matchs apart;

 

Although ● matchs circuit frequency to become much, but match amount of yuan of parts of an apparatus every time little, decrease mutual an influence, rise match efficiency.

 

Graph 3 debug with match referenced plan

 

5 measure distributinging parameter impedance

 

Before measuring, undertake network analyzer calibration. Above all the parts of an apparatus or appliance that matchs a network is removed on PCB board on solder, open circuit the be born component of impedance network next, series connection component uses 0Ω resistor short circuit, if pursue,4 are shown. Do not use soldering tin short circuit as far as possible, because be opposite for high frequency circuit, soldering tin produces parasitism effect easily, the influence measures an outcome.

 

Graph 4 solder debug parts of an apparatus

 

Undertake aerial matchs during debugging, need disconnects the join that is the same as chip. Undertake chip matchs during debugging, need disconnects to match the join of the group with aerial, receive link match and launch link match to undertake debugging respectively through switch switch.

 

Those who need special attention is the impedance that measures emissive link, generally speaking the impedance that we should get small perhaps signal launchs the static state only can help us complete a design, linear enlarge area is in when blasting off because of chip, get fine tuning parts of an apparatus wants only after impedance, can achieve first-rate to output power. If need the output when status of more accurate job Where is impedance? Also be possible of course, this needs us to join more parts of an apparatus, if pursue 5.

 

Graph the 5 S22 when measuring chip to blast off

 

In the graph 5 in, the amplifier that be measured is the power amplifier of chip, make its are entered most high-power output; And test signal source offers A2 of signal of a retrorse input to arrive amplifier; The reflection signal B2 that amplifier output end produces is detected by receiver through directional coupler; The parameter of than be amplifier namely big signal S22 of B2 and A2.

 

Need notices at 2 o’clock:

 

● is measured need adds directional isolator between chip and test signal source, avoid source of signal of big signal attaint;

 

● chip outputs frequency and signal test frequency to want different frequency.

 

Debug measure specificly to be as follows:

 

Analyzer of ● calibration network, calibration arrives to join board the cable of radio frequency wire that go up;

● measures impedance through network analyzer;

Graph of close Si Yuan of history of ● have the aid of undertakes impedance matchs;

● chooses right electric capacity and inductance solder to receive PCB to go up;

● measures the output of wireless chip and input to whether satisfy a requirement.

 

In matching a course, choose yuan of parts of an apparatus to follow the following principles commonly:

 

Value of capacitance of ● be born does not pass big, electric capacity is larger, capacitive reactance is smaller, signal flows into GND easily;

Value of ● capacitance, inductance does not pass small, because be put in the error, look value, feeling value is less, error impact is bigger, affect the stability of batch;

● capacitance, inductance chooses groovy value, go to the lavatory to replace and get the materials ready purchase.

 

6 brief summary

 

Impedance matchs a course in, we should understand the parameter of data manual above all, find the basis that directive circuit designs, if circuit develop attacks parameter of graph, S; In debugging a process, analyzer of network of have the aid of measures the impedance of actual circuit, graph of Si Yuan of use Shi Mi assists us to complete a design; Also gave referenced proposal to the choice of capacitance, inductance finally. Hope the article can give matching in impedance medium you a few helps.