Arrive from the Chinese Academy of Sciences Sai Lang science and technology: China exceeds the be born road of high-powered chip

Arrive from the Chinese Academy of Sciences Sai Lang science and technology: China exceeds the be born road of high-powered chip

The process that 5G comes is being quickened.
Current, 5G is in the crucial level with certain level, this year in June, 3GPP of international standard organization is about to finish 5G standard of international of the first version. Policy profit is good at the same time uninterrupted also, on April 24, hair change appoint, the Ministry of finance issues an announcement, will reduce frequency of system of 5G public mobile to hold cost standard…
5G technology can support the of all kinds robot that includes a car inside not only (20.11 +3.93% , examine) smooth interconnection each other is connected, also will be smartphone, intelligence the many domains such as household, artificial intelligence, big data and cloud computation come true ” qualitative ” the foundation that upgrade technology.
Face this head on and the 5G tide that come, is chip industry of China ready? Although block and long, dan Yihua thinks of the China that is a delegate for the sea wisdom go to still let a person expect. Get in base band at present region, it is exclusive that Hua Weihai is thought of but with the Chinese company that tells photograph comparing high, this is China for 30 come for years the result that all sorts of element accumulate, also be not accomplish in one move.
And in poineering company level, also a company appears particularly special: Be born out of institute of automation of Yu Zhongke courtyard, former state is special integrated circuitDesign a projectTechnical research center (established 1992) Sai Lang science and technology, by automation of this center former chairman, former Chinese Academy of Sciences institute director Dr. Wang Donglin heads a group, had developed a MaPU of high-powered domain microprocessor, maPU realized algebra firstAlgorithmicClass overall situation is optimized and height but process designing, already shed a success 2015.
MaPU can realize international completely not only of the tycoon but the function of process designing processor, and power comsumption comparing can rival ASIC. Be based on MaPU, further development gave Sai Lang science and technology processor of 3 big fields: The UCP that faces 5G communication domain, face muchMediaThe UMP of the domain, and face exceed the HPP that calculates a domain. In the meantime, still deployed AI domain processor: NNE of engine of deepness nerve network.
Recently, in automation of Chinese Academy of Sciences, investment group interviewed author of Sai Lang science and technology to hold chief scientist Wang Donglin concurrently. Wang Donglin puts forward algebra the earliest in the worldAlgorithmicClass ” overall situation optimizes computation “Framework, be based on thisFrameworkThe MaPU of the design is being calculated ability and mask of example of function power comsumption have international banner level.
Author of Sai Lang science and technology holds chief scientist king concurrently Dong Lin
MaPU of high-powered domain microprocessor
Wang Donglin introduces, the characteristic with the biggest MaPU is computation capability is strong, power comsumption is low.
Current, the processor with commonly used market has a few kinds, one kind is programmable processor, for instance the processor of Intel, TI, because but process designing, adaptability is very wide. But when should carrying out algorithm of a maths, the utilization rate of its arithmetic unit is in commonly 15% the left and right sides, tall can arrive 20% . The processor of TI, arithmetic unit utilization rate is top also can arrive only 40-50% . These processor sky have that is to say so tall frequency, have so much resource for nothing, but its executive efficiency is not tall.
Still one is plant is need not the ASIC of process designingPlan, it is usedHardwareHad kept algorithmic flow and the control to algorithm. This kind is algorithmic accelerator actually, executive efficiency will be very accordingly tall, almost OK and adjacent 100% .
Apparent, there can be vast difference on power comsumption between process designing processor and ASIC. The problem of ASIC is, efficiency is tall, but algorithm is not alterable, algorithm should change only a bit, this chip cannot be used.
And MaPU can achieve the efficiency that is close to ASIC already (computational resource utilization rate can achieve 90% above) , at the same time also height but process designing, hold a both advantage concurrently.
Calculate chip in order to exceed to be exemple, the function power comsumption of MaPU compares the whole world
Look in Wang Donglin, current main trend but the core problem of process designing processor depends on it is conventional architecture, dictate administrative levels is low and try to pass random foreword to blast off more in moving hour wait for a technology to come true as far as possible local and collateral carry out. This caused the computation in chip resource utilization rate is not high, data IO amount is large, dynamic power comsumption is big, integral function power comsumption is compared not tall, what already incommensurate current society calculates ability and extremely low power comsumption to microprocessor gigantic a major programme of lasting importance is double long for. If can think from applied algorithm whole,the different dimension such as time and space spends collateral character, use these collateral character to undertake integral sex is optimized arrange, itsKernelThe utilization rate of medium arithmetic unit will be obtained rise considerably. Then Wang Donglin and his group course is calculated accurately and experiment, put forward what overall situation of algebraic algorithm class optimizes to solvePlan.
“An instruction, can realize an algebra algorithm, call algebra the instruction so. The instruction collect of traditional framework is the instruction of arithmetic manipulation class. ” Wang Donglin says, maPU upgrades his to dictate for algebraic class algorithm, “MaPU dictates through algebra soft automation line comes trends of 0 delay time reframes (suit with algorithmic photograph)HardwareFramework, achieve basic and as same as ASIC algorithmic framework, the overall situation that realizes whole algorithm optimizes executive process. “
In short, maPU can support overall situation of applied algorithm class to optimize already, the computational framework that can pass height to be able to reframe again and storage system are inSoftwareThe level comes true this bit, can get used to a domain neatly (5G communication, muchMedia, exceed calculate or artificial intelligence) inside all sorts of algorithm, can say MaPU assembled the advantage of ASIC, FPGA, CPU, it is almost OK with the function of ASIC power comsumption comparing rivals ” soft ASIC. “
“Microprocessor of MaPU- algebra operation, dictate in system of collateral algebra operation, collateral storage system and hardware framework respect generate innovation of great and primitive sex, prop up microprocessor hardware from scalar quantity / exceed promotion of scalar quantity operation to come algebraic operation administrative levels, quantitative level land promotes computation concentrated V-neck region microprocessor can effect comparing. ” Wang Donglin is summed up so.
So, particular function and power comsumption compare index how, wang Donglin gave out a group of direct comparative data:
Exceed with auroral H1.0 calculate chip to be exemple, chip interior is compositive 32 HPP handle a nucleus, capability of processing of double precision floating-point will be achieved 4, 659GFLOPS@64, it is 40W left and right sides only via evaluating power comsumption, function power comsumption is compared achieve 116GFLOPs@64/W, for the whole world the first.
Accordingly, after MaPU application quantity is produced, the framework advantage of its original creation makes hopeful our country achieves major breakthrough on microprocessor framework, in coequal specific power consumption more gigantic than next releasing a major programme of lasting importance calculates capacity, the own innovation that leads Chinese electron the industry develops.
To this, bai Chunli of dean of Chinese Academy of Sciences ever expressed in media in March this year: “In high-techProductRespect of research and development, the Chinese Academy of Sciences is about to release to have completely ownIntellectual propertymicroprocessor — MaPU algebra processor, achieve international banner level. After believing MaPU series processor comes out, wait for alive bound computer, communication domain and market of broad consumption electronProductShine brilliantly in. “
“Of MaPU 3 the child “
On the foundation of MaPU, further development gave Sai Lang science and technology the domain processor with 3 powerful function: UMP of processor of domain of UCP of processor of 5G communication domain, multimedia, and super- calculate domain processor HPP.
UCP: The whole world comes true thoroughly firstSoftwareDefinition radio.
UCP is MaPU the general communication processor that increases in the light of mobile is 5G grand base the chip of processor of station radical stationKernel, every second can finish UCP kernel 5.8G nods plural FFT surely, every second can finish the LDPC encode of 55GBPS and 2.5GBPS coding. The pacing at the beginning of the basis calculates, a base band processor that contains 20 UCP kernel can satisfy 64 antenna 5G grand base the station is all base band handles demand.
“If use FPGS to build 5G system, need multichip solution of system of interconnection ability implementation, and the circuit system that is based on FPGA advocate frequency is general <400-600MHz, piece bandwidth gets an interconnection bus line be restricted, operation ability suffers be restricted, this will become the bottleneck that implements 5G system. ” Wang Donglin says.
At present UCP kernel is international is banner in the implementation below acceptable price complete software defines 5G the processor kernel of processing system of wireless transmission base band, wang Donglin is UCP definition ” the software that mobile domain realizes base band to handle thoroughly defines radio. “
Besides base stationEquipmentBeyond manufacturer, UCP kernel still can provide 5G terminal manufacturer. As a result of the reason of 5G standard, all terminal should embed afresh the base band kernel that gets used to 5G algorithm (original base band kernel or DSP kernel cannot answer 5G to be issued to lower levels is received and go up the big operation when sending is measured) , this also is the opportunity of UCP kernel. Much syncretic is wireless communicationEquipment, each domain broadband from group net terminal also be the space that UCP defines ability of radio engineering put to good use through complete software.
UMP: Rely on TV of its smartphone, intelligence but online upgrade experience of seeing and hearing, can be high-definition photography, photograph resemble waiting for application to offer super engine.
The 2nd UMP is MaPU ” the child ” , face the multimedia microprocessor kernel of TV of smartphone, intelligence.
UMP invented more efficient collateral processing framework on foundation of MaPU basic framework, make power comsumption comparing and ASIC photograph rival the performance of operation of processing of of all kinds video, certain respect wins out even, still maintained altitude at the same time but process designing is characteristic.
“This kind of characteristic can make family expenses TV inspects frequency to handle algorithmic gradual progress as TV manufacturer online improvement inspects frequency to experience the effect, ASIC TV chip cannot be likened to this. ” Wang Donglin expresses, “Also can improve through algorithm and software at the same time roll out new product quickly. “
4 UMP kernel + the chip of engine of freeboard clear TV that an ARM kernel makes (power comsumption does not exceed 8 tile) of clear TV of freeboard of OK and contented 4K all inspecting frequency processing and the overall demand that are based on TV of An Zhuo system to manage, effect of seeing and hearing can rival Suo Ni and SamSung top end TV. 14 UMP kernel + the chip of super TV engine that an ARM kernel makes can satisfy TV of 8K freeboard Qing Dynasty all processing and computational demand.
After the kernel of NNE of engine of network of nerve of AI domain deepness that adds Sai Lang research and development, it is intelligent TV or smartphone no matter, can be in function of implementation of vision of high-definition video, machine, interactive respect is jumped greatly litre, let product of homebred consumption electron raise an user to use an experience considerably below inferior cost. Chip of engine of the first super TV will flow at be being finished by 2018 piece, can begin to face intelligent TV manufacturer to undertake applied popularizing.
HPP kernel exceeds calculate processor photograph relatively at Intel newest processor function power comsumption is closer than rising an amount class.
Current, the 3rd of MaPU ” the child ” HPP kernel has been a more mature product.
“The core capability that MaPU obtains through framework innovation or high density collect spend computation. ” accordingly, wang Donglin hopes to be aimed at general computation domain to increase through MaPU all the time model kernel HPP (high-powered processing) form super- calculate model microprocessor, satisfy the requirement of high-end server domain.
Developed auroral H1.0 thereby — super computation kind MaPU microprocessor (predicting the end of the year is finished stream piece reach measure) , the function power comsumption that evaluates auroral H1.0 via the design compares the other on Yuan Chaoguo border to exceed calculate kind of microprocessor, can serve as exceed the core processor that calculates system and super server.
Wang Donglin gave out a group of data:
Be based on HPP kernel super- consider processor aurora H1.0 and Intel newest Xeon Phi function comparatives, but but 16/32/64/128 reframe neatly, function power comsumption is closer than rising an amount class: Offerring coequal H1.0 of the aurora when ability of 64 floating-point operation (2×16 HPP kernel) power comsumption is 40W, processor of Intel Xeon Phi is 300W.
NNE: Processing of net of nerve of top class deepness
Another product of Sai Lang: NNE of nerve network engine accedes and developed MaPU quickly ” system of homocentric round storage optimizes a model ” , undertook optimizing in the light of deepness nerve network, the advantage is to be aimed at mainstream nerve network, entire network takes in and send out in large quantities rate is high, visit put demand and power comsumption low, with Ying Weida function of kernel of deepness nerve net comparatives but efficiency is taller. Sai Lang’s NNE absorbs MaPU overall situation to optimize a thought when network of storage system and configuration deepness nerve, function power comsumption is compared on the advantage is clear.
“NNE can support deepness study training, support intelligent inference particularly, did in respect of video pattern recognition optimize technically, in target detection, identify, respect of video image structuralization has more outstanding advantage. ” . Wang Donglin introduces.
An applied setting that can expect is intelligence drive, in this setting, UMP is OK multichannel of high speed processing photographs image resembling a head and extraction is waited for identify a target; NNE is in charge of understanding judgement to handle road condition, car condition to be offerred decision-making reach drive the crucial news that dominates a need; And UCP is in charge of offerring extremely short when the capacity of communication of car couplet net that extend.
Pleasant be on the bench, hold to research and development scientific research group of nearly 10 years
Sai Lang reachs its predecessor group, begin collective of deploy new statement to fasten structural research from 2009, the microprocessor framework MaPU that gives completely own innovation to research and development had experienced 9 years of hard years. Group of research and development fastens former state special integrated circuitDesign a projectThe researcher of many 70 core of technical research center.
2 quarters began 2017, the group begins a company to change run.
Wang Donglin is a person that has technical belief, group associate also is such. Talent of all along of integrated circuit domain is insufficient, personnel is in short supply. Because make the hardware such as chip too bitter, accrual not tall, many outstanding students are willing to choose finance and Internet profession more after graduation. Do chip to need to have craftsman mind, the technical talented person that needs a tip is willing to sink next hearts make research and development, can bear for a long time research and development is successful pressure. The group of research and development that considers bright science and technology was accomplished.
A few when be based on MaPU enhance domain processor to there is an advantage each in respective domain, also can combine actually use, thereby in the actual setting that be born goes to all sorts of differring: Household of 5G communication, smartphone, intelligence, super- calculate, intelligence drives, wisdom city, robot and unmanned aircraft are waited a moment.
“Rub Er law is impossible forever applicable, chip function upgrades encountered cosmopolitan bottleneck, this just is the optimal opportunity that we pursue. ” Wang Donglin says, “Chip is an industry that needs patience, we had done 9 years, the foundation has been hit, next is mainly go adjusting in applying actually, go optimizing. “

Leave a Reply

Your email address will not be published. Required fields are marked *