Develop quickly as electronic technology, and the wide application of wireless communication technology in each domain, high frequency, high speed, high density already made one of remarkable development trends of contemporary electron product stage by stage. Signal is transmitted high frequency change and high speed digitlization, force PCB to move toward small hole and bury / blind Kong Hua, lead is changed subtly, medium layer is even thin model change, high density of high frequency high speed is multilayer PCB design technology already made a main research field. Author basis designs the experience in the job in hardware for years, sum up the design skill of a few high frequency circuit and note, consult for everybody.

 

1, how to choose PCB board?

 

Choice PCB plank must be mixed in contented design requirement can measure produce equilibrium point is gained among gender and cost. Design requirement is included electric with the orgnaization this two parts. Designing board of special high-speed PCB normally (the frequency that is more than GHz) when it is more important that this material is inscribed questioningly. For example, commonly used now FR-4 material is qualitative, the dielectric loss when the frequency of a few GHz (Dielectric Loss) can have very big effect to signal attenuation, the likelihood is not operable. Electric and character, should notice dielectric constant (the frequency that Dielectric Constant) and medium caustic design in place is operable.

 

2, how to avert high frequency interference?

 

The main train of thought that averts high frequency interference is the interference that reduces field of electromagnetism of high frequency signal as far as possible, namely so called string together faze (Crosstalk) . Usable pull the distance between signal of big high speed and imitate signal, or add Ground Guard/shunt Traces to be on the side of imitate signal. Notice digital ground is disturbed to the noise of imitate ground even.

 

3, in high speed design, how to solve the integrality problem of signal?

 

Signal integrality basically is the question that impedance matchs. And the framework that affects the element that impedance matchs to have signal cause and output impedance (Output Impedance) , walk along the characteristic impedance of the line, what load carries is characteristic, the develop that takes a line is plain (Topology) framework. Settlement way is to rely on termination (Termination) and the develop Chinese hackberrya that adjust a line.

 

4, how does way of poor distributinging line realize?

 

The wiring with poor right cent has wanted to notice at 2 o’clock, the length that is two lines should grow euqally as far as possible, the another span that is two lines (this span is decided by the impedance that need branch) should keep changeless all the time, want to keep parallel namely. Parallel means has two kinds, go in for two lines same layer taking a line (Side-by-side) , walk along two in fluctuation photograph adjacent for two lines (Over-under) . General with former Side-by-side(side by side, side-by-side) the means of implementation is more.

 

5, the clock line that carries to having an output only, how to realize the wiring that need branch?

 

Wanting wiring of the cent that use difference is signal source and sink certainly also be the signal that need branch ability is significant. The clock signal that carries to having an output only so cannot use the wiring that need branch.

 

6, is line of sink poor branch right between can you deny add block of a distribution?

 

Sink difference divides a line to be opposite block can increase a distribution between normally, its are worth the value that should be equal to the impedance that need branch. Such signal quality will be better.

 

7, the wiring that why differs cent to be opposite should be stood by and parallel?

 

Right to needing branch wiring kind should want to be stood by appropriately and parallel. Alleged and proper because this span can affect the impedance that need branch,standing by is (the value of Differential Impedance) , this value is the important parameter that designs poor cent to be opposite. Because want to maintain the consistency of the impedance that need branch,needing parallel also is. Be like two lines ignore far ignore close, the impedance that need branch is met abhorrent, can affect signal integrality (Signal Integrity) and time defer (Timing Delay) .

 

8, the problem that if why handle actual wiring if why handle actual wiring,medium a few theory conflict?

 

Basically, the model / it is right that several ground break up segregation. Those who want an attention is signal walks along a line to had been not crossed as far as possible have intersected place (Moat) , still have the way of circumfluence electric current that does not allow power source and signal (Returning Current Path) becomes too big.

 

Brilliant brace up it is make a present of of simulative positive and negative oscillating circuit, want to have stable oscillation signal, what must satisfy Loop Gain and Phase is normative, and the oscillation standard of this imitate signal is disturbed very easily, although add Ground Guard Traces,the likelihood also cannot keep apart interference completely. And those who leave too far, the noise on ground level also can affect make a present of of positive and negative oscillating circuit. So, must brilliant brace up the distance with chip is stood by into the likelihood.

 

Really the requirement of high speed wiring and EMI has a lot of conflict. But basic principle is the resistor electric capacity that increases because of EMI place or Ferrite Bead, a few electric character that cannot create signal not agree with add up to a standard. So, the skill that had better take line and PCB alternate layer with arrangement first will solve or reduce the problem of EMI, if high speed signal walks along lining. Final ability uses the means of resistor capacitance or Ferrite Bead, in order to reduce the harm to signal.

 

9, the contradiction between the manual wiring that how solves high speed signal and automatic wiring?

 

The automatic wiring of stronger now wiring software implement for the most part set restrains a condition to control the means that wind a string to had reached opening number. The ability of the engine that wind a string of each EDA company and the set project that restrain a condition differ sometimes very far. For example, whether sufficient tie condition controls route of move with the body on the ground (the means with winding Serpentine) , whether the span taking a line that controls poor cent to be opposite. Whether can the means taking a line that this meeting influence comes out to automatic wiring accord with the architect’s idea. Additional, the hand is moved those who adjust wiring is difficult easy also have absolutely concern with the ability of the engine that wind a string. For example, take the elbow ability of the line, cross the elbow ability of aperture, walk along a line to be waited a moment to the elbow ability of apply copper even. So, the choice circles the wiring with line engine strong capability implement, just be settlement way.

 

10, about Test Coupon.

 

Test Coupon is whether the characteristic impedance of PCB board satisfies design requirement with what will measure a production with TDR (Time Domain Reflectometer) . Want pilot impedance to odd root line and poor cent are opposite commonly two kinds of circumstances. So, the line taking a line on Test Coupon is broad be apart from with the line (when cent having difference is right) like wanting to want pilot line with place. The most important is the position that the place accepts when measuring. To reduce ground connection lead (the inductance value of Ground Lead) , TDR explore club (the place that the place of Probe) ground connection is close to quantity signal very much normally (Probe Tip) , so, the distance that the place that signal measures on Test Coupon nods with ground connection and means should accord with uses explore stick.

 

11, in design of high speed PCB, the blank area of signal layer is OK apply copper, and is the apply copper of many signal layer mixed in ground connection receive how should allocate on power source?

 

Be in commonly the apply copper of clear area region majority circumstance is ground connection. Just want to notice the distance of apply copper and line when copper of the apply other high speed line, because the copper of place apply can be reduced,walked along the characteristic impedance of the line. The characteristic impedance that also should notice not to affect its layer, it is for example when the structure of Dual Strip Line.

 

12, whether can you use the line above power source plane impedance of character of computation of microstrip line model? Whether can be the signal between power source and ground level used banding line model computation?

 

Yes, in computation plane of the power source when characteristic impedance must count referenced plane with ground level. For example 4 layer board: Top layer – power source layer – layer – rock-bottom, the model that carries an impedance of character taking a line on the head at this moment is the microstrip line model that is referenced plane with power source plane.

 

13, does the test arise automatically to nod the test that usually can contented big batch produces to ask through software on high density printed board?

 

The standard that general software selects demand of whether contented test to must look to be nodded to imposing a test from movable unripe test accords with the requirement that tests machines and tools. Additional, if take a line too the standard that Mijujia checks a place is more severe, do not have method likely to add a test automatically to nod to every paragraphs of line, of course, need hand is moved fill the place that wants a test together.

 

14, the quality that adds test site to you can affect high speed signal?

 

As to can affect signal quality to be about to see the means that increases test point and signal after all much faster and calm. Basically adscititious test is nodded (need not online already some perforation (Via Or DIP Pin) is nodded when the test) the likelihood is added in online or be from online draw a paragraph of small line. Former comparative to add a very small electric capacity to be in then online, latter is much a paragraph of branch. These two circumstances can be met more or less to high speed signal influence having a place, the frequency rate that the degree of the influence follows signal and ratio of change of signal predestined relationship (Edge Rate) is concerned. Influence size can be passed through emulate be informed. It is good that in principle checks bit of Yue Xiaoyue (the requirement of machines and tools of even contented of course test) branch is shorter better.

 

15, a certain number of PCB form a system, each board how should the ground wire between join?

 

Each PCB bat join the signal between or power source are when the movement each other, for example A bat has power supply or signal sends B bat, regular meeting has the electric current that waits for a quantity to return A board from ground laminar flow (this is Kirchoff Current Law) . The electric current on this layer can look for the local regurgitate with the smallest impedance. So, be power source or signal without giving thought to individually place of mutual connective interface, the pin that distributes layer is counted cannot too little, in order to reduce impedance, can reduce the noise on layer so. Additional, also can analyse way of annulus of whole electric current, especially the part with larger electric current, move those who make layer or ground wire to receive a standard, come to those who control electric current take a way (for example, someplace makes low impedance, the electric current that lets much walks along) from this place, reduce the effect of more sensitive to other signal.

 

16, can you introduce the technical book that a few abroad design about high speed PCB and data?

 

The application of circuit of high speed number has the relevant field such as communication network and calculator now. In communication network respect, the working frequency of PCB board already amounted to GHz to fluctuate, fold what what number of plies knows to have 40 with respect to me. Apply related the calculator also the progress because of chip, no matter be general PC or server (Server) , the top job frequency on bat also has achieved 400MHz (to be like Rambus) above. Because of answering high density of this high speed spends line demand, blind buries aperture (the demand that Blind/buried Vias) , Mircrovias and Build-up make Cheng technology is gradually increasing also. These design requirement have a firm but mass-produced.

 

17, two characteristic impedance that often are consulted are formulary:

 

Microstrip line (Microstrip) Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)] among them, w is a line wide, t is the cupreous skin ply of the line, h is the line distance to referenced plane, er is the dielectric constant with PCB qualitative plank (Dielectric Constant) . This formula must reach the circumstance ability of 1<(Er)<15 to apply in 0.1<(W/H)<2.0.

 

Banding line (Stripline) Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} among them, h is the distance with two planar reference, and take a line be located in two referenced plane among. This formula must reach the circumstance ability of T/H<0.25 to apply in W/H<0.35.

 

18, can you deny among the line that need branch add ground wire?

 

Difference is to cannot add ground wire commonly among cent signal. Because differ the applied principle of minute of signal the most important is to use difference to distribute signal mutual coupling (the profit that Coupling) place brings, be like Flux Cancellation, fight noise (Noise Immunity) ability. If the inter adds ground wire, can destroy coupling effect.

 

19, whether does firm adagio design need special design software and standard? Can domestic where carry on treatment of this kinds of circuit board?

 

Can be designed with the software that designs PCB commonly flexible circuit board (Flexible Printed Circuit) . Give FPC manufacturer birth with Gerber format euqally. Differ as a result of production technology and general PCB, each works chamber of commerce can are opposite according to their engineering capability most flyer is wide, most flyer is apart from, the smallest aperture (Via) has his to restrict. Besides, can be in flexible the turn place of circuit board spreads some of copper skin to try to fill strong. Can get online as to manufacturing manufacturer it is OK that “FPC” inquires when the keyword find.

 

20, what is the principle of the site that selects PCB and crust ground connection appropriately?

 

Choice PCB and the principle that dot of crust ground connection chooses are to use Chassis Ground to offer the method of low impedance to give circumfluence electric current (Returning Current) and the route that control this circumfluence electric current. For example, can borrow around high frequency parts of an apparatus or clock generator normally secure used screw to make the layer of PCB and Chassis Ground connection, with narrowing road surface of whole report regurgitate is accumulated as far as possible, also reduce electromagnetism radiate.

 

21, circuit board DEBUG should wherefrom a few respects begins?

 

With respect to digital circuit character, decide 3 issues according to foreword first above all: 1. The size that affirms all power source are worth all achieves design place to need. The order that the system of a little multiple power source may ask to rise between certain power source and speed have some kind is normative. 2. It is normal to affirm frequency of all clock signal works and not was not on signal brim drab (the problem of Non-monotonic) . 3. Affirm whether Reset signal achieves normative requirement. If these are normal, chip should want to give out the first cycle (the signal of Cycle) . Next according to system runs principle and Bus Protocol to come Debug.

 

22, it is below the circumstance that circuit board dimension secures, if need to accommodate more functions in the design, often need to increase the density taking a line of PCB, but the mutual interference that causes a string so likely increases, take a line at the same time meticulous also make impedance cannot be reduced, ask expert introduction to be in high speed (> 100MHz) the skill in design of high density PCB?

 

When high density of design high speed spends PCB, string together faze (Crosstalk Interference) wants special attention really, because it is right sequential (Timing) and signal integrality (Signal Integrity) has very big effect. Provide the place of a few attentions below:

 

Those who control line character impedance is successive with match.

 

Take the volume of line span. The span that often sees commonly is double line wide. Can pass through emulate the influence that will know space to be apart from pair of sequential and signal integrality, find out sufferable the smallest span. The outcome of different chip signal may be different.

 

Choose proper termination way.

 

Avoid fluctuation photograph adjacent two way taking a line is same, have line as it happens to overlap together up and down even, the case that because this kind strings together faze comparing,is the same as layer photograph adjacent to take a line is big still.

 

Use blind to bury aperture (Blind/buried Via) will raise line area. But the making cost of PCB board can raise. When be being carried out actually really very inaccessible complete parallel and wait long, do not pass or want to be accomplished as far as possible.

 

Divide this beyond, can termination of obligate poor cent and in all modular termination, in order to alleviate the influence of pair of sequential and signal integrality.

 

23, the filter wave that imitate power source is in often is the circuit that use LC. But why sometimes is LC poorer than effect of RC filter wave?

 

The frequency band that the comparison of LC and effect of RC filter wave must consider to want filter to drop and the choice that inductance is worth are appropriate. The inductance because of inductance (Reactance) size and inductance value and frequency are concerned. If the noise frequency of power source is inferior, and inductance is worth not quite big, at this moment filter wave effect may be inferior to RC. But, the price that wave of use RC filter should pay is resistor itself meeting waste time can, efficiency is poorer, and should notice what to choose resistor can susceptive power.

 

24, inductance is chosen when filter wave, what is the method that capacitance is worth?

 

Inductance is worth outside choosing the noise frequency that thinks besides the consideration filter is dropped, consider the reaction ability of instantaneous electric current even. If the output of LC carries can organic meeting to need to export big electricity for an instant, criterion inductance is worth too congress block up this is big electric current sheds the speed via this inductance, increase ripple noise (Ripple Noise) . Capacitance value is mixed the size that the ripple noise standard that can tolerate is worth is concerned. Demand of ripple noise cost is less, capacitance value will be greater. And the ESR/ESL of capacitance also is met influential. Additional, if this LC is to be put in switch type power source (when the output of Switching Regulation Power) is carried, the limit that notices this LC place arises even at 0 o’clock (Pole/zero) is controlled to losing feedback (the influence of stability of loop of Negative Feedback Control) .

 

25, how as far as possible achieve EMC requirement, do not send again create too great cost pressure?

 

Because increase layer amount to be reached in order to enhance screen effect,the cost that the meeting on PCB board raises because of EMC is normally increased the Ferrite Bead, Choke reason that controls parts of an apparatus of high frequency harmonic. Besides, still need the screen structure ability on tie-in other orgnaization to make whole system adopts the requirement of EMC normally. The following only the electromagnetism radiate effect that the design skill of PCB board provides a few to reduce circuit to arise.

 

Choose signal slope as far as possible (the parts of an apparatus with slower Slew Rate) , in order to reduce the high frequency part that signal place produces.

 

Note the position that high frequency parts of an apparatus puts, not too stand by external connector.

 

The impedance that notes high speed signal matchs, layer taking a line and method of its circumfluence electric current (Return Current Path) , in order to reduce high frequency reflex and radiate.

 

Place in the power source pin of each parts of an apparatus enough with go appropriately coupling capacitance is mixed with layer of alleviation power source the noise on layer. Special attention the frequency of capacitance answers the character with temperature to whether accord with design place to need.

 

External the ground near connector can be done with layer break up appropriately, receive the ground nearby of connector Chassis Ground.

 

Can apply Ground Guard/shunt Traces to be by signal of a few special high-speed appropriately. But should notice Guard/shunt Traces is characteristic to taking a line the influence of impedance.

 

Power source layer is compared 20H shrinks inside layer, h is the distance between power source layer and layer.

 

26, there should be many numbers in PCB board together / modular function piece when, groovy practice is to want to will be counted / modular ground is apart, does the reason where?

 

Will count / because digital circuit is when switch of potential of on any account,the account with modular separate ground is can mix in power source landed unripe noise, the size of noise is concerned with the speed of signal and voltaic size. If be not broken up on ground level and the noise that produces by place of digital area circuit is bigger and the circuit of imitate area is close to very much again, criterion although digital-to-analogue signal not across, simulative signal still can be disturbed by ground noise. That is to say digital-to-analogue ground is not used when the digital circuit region that intersected means can be apart from generation big noise in imitate circuit area only is more remote.

 

27, another kind of course of action is to be in ensure several / modular departure layout, and several / modular signal takes a line mutual not below alternate circumstance, whole PCB board ground is not done break up, several / modular ground arrives repeatedly on this ground level. Does the truth where?

 

Digital-to-analogue signal takes a line cannot alternate requirement is because of speed its return a bit fast number signal voltaic method (Return Current Path) is met as far as possible the fountainhead along the signal of ground regurgitate number near the lower part that takes a line, if digital-to-analogue signal walks along line across, the noise that returns voltaic place generation can appear inside imitate circuit area.

 

28, when graph of principle of design of high speed PCB is designed, how to consider impedance to match a question?

 

When designing circuit of high speed PCB, impedance matchs one of element that are a design. And impedance value has absolutely concern with means taking a line, it is to go in exterior layer for example (Microstrip) or lining (Stripline/double Stripline) , with referenced layer (power source layer or layer) distance, walk along line width, PCB material pledges the characteristic impedance that waits to all can affect a line is worth. Want to decide in the ability after wiring impedance is worth that is to say. The maths that general emulation software can use because of line model or place is restricted algorithmicly and cannot consider the wiring case with a few discontinuous impedance, go up in principle graph at that time can obligate) of termination of a few Terminators(, wait like series connection resistor, will alleviate the effect with line discontinuous impedance. Solve the method of the problem at all truly or notice to avoid the happening with discontinuous impedance as far as possible when wiring.

 

29, where can you provide more accurate IBIS model library?

 

The accuracy of IBIS model affects emulated result directly. Basically the electric and characteristic data that IBIS can regard equivalent circuit of actual chip I/O Buffer as, can be changed by SPICE model commonly and get (Yi Ke is used measure, but restrict more) , and the data of SPICE and chip are made have absolutely concern, so same different chip manufacturer offers a parts of an apparatus or appliance, the data of its SPICE is different, inside the IBIS model after be being changed then according to also be being met subsequently and different. That is to say, if used the parts of an apparatus of A manufacturer, they are only capable to offer their parts of an apparatus or appliance accurate model data, it is clearer to because do not have other person,can compare them their parts of an apparatus is by why to plant craft is done. If manufacturer place is offerred IBIS is not accurate, can asking this manufacturer improves ability ceaselessly only is the way that settles at all.

 

30, when high speed PCB is designed, the architect should consider the regulation of EMC, EMI from those respects?

 

The need when general EMI/EMC is designed considers radiation at the same time (Radiated) and conduct (Conducted) two respects. The share with higher frequency of former vest in (> the part that 30MHz) latter is inferior frequency (<30MHz) . Cannot notice only so high frequency and the part of oversight low frequency. A good EMI/EMC design must be about to consider the position of parts of an apparatus when layout at the beginning, PCB folds the arrangement of the layer, important online take a way, the choice of parts of an apparatus, if these do not have beforehand to have relatively the arrangement of beautiful, after the event solves a meeting get half the result with twice the effort, raise cost. For example the position of clock generator is not stood by as far as possible external connector, high speed signal walks along lining as far as possible and notice characteristic impedance to match with referenced layer reflex in order to decrease continuously, the slope of the signal that place of parts of an apparatus turns (Slew Rate) as far as possible small with the bring down high frequency composition, the selection goes coupling (notice its frequency is answered when Decoupling/bypass) capacitance whether to accord with demand in order to reduce noise of power source layer. Additional, the circumfluence way that notices electric current of high frequency signal makes its answer road area as far as possible small (namely loop impedance Loop Impedance as far as possible small) in order to reduce radiation. The way that still can cut layer with cent in order to control the limits of high frequency noise. Finally, the proper ground connection that chooses PCB and case is nodded (Chassis Ground) .

 

31, how to choose EDA tool?

 

In current Pcb design software, hot analysis is not a strong point, do not suggest to choose so, the function of other 1.3.4 can choose PADS or Cadence performance/price ratio is pretty good. The abecedarian of the design of PLD can use the compositive environment that PLD chip manufacturer provides, sheet can be chosen to choose a tool when the design that accomplishs 1 million above.

 

32, the EDA software that recommends a kind to agree with to high speed signal is handled and be transmitted please.

 

Groovy circuit is designed, the PADS of INNOVEDA is very pretty good, and those who cooperate to use emulate software, and this kind of design often held the applied circumstance of 70% . Doing design of high speed circuit, imitate and number mix circuit, the solution that employs Cadence should belong to the software with better performance/price ratio, of course the performance of Mentor is very good still, especially field of its management of design technological process should be most outstanding. (big the Tang Dynasty telegraphic technologist king rises)

 

33, to PCB board the explanation of each meaning?

 

Topoverlay- – name of parts of an apparatus carrying a layer on the head, also call Top Silkscreen or Top Component Legend, for instance R1 C5,

 

IC10.bottomoverlay- – the Multilayer that be the same as manage- – if you design a 4 layer board, you place a Free Pad Or Via, define it to serve as Multilay so its Pad can appear automatically on 4 layers, if you define it only,be Top Layer, so its Pad can appear on top layer only.

 

34, high frequency PCB designs 2G above, take a line, composing, what respect should note mainly?

 

High frequency PCB belongs to 2G above design of radio frequency circuit, not be inside discussion limits of design of circuit of high speed number. And the layout of radio frequency circuit (Layout) and wiring (Routing) should consider together with principle graph, because layout wiring can create composition cloth effect. And, radio frequency circuit designs a few passive parts of an apparatus is to pass parameter to change a definition, special appearance Copper Foil comes true, because this asks EDA tool can offer parameter to influence parts of an apparatus, can edit special appearance Copper Foil. There is special RF to design module in the Boardstation of Mentor company, can satisfy these requirements. And, design of general radio frequency asks to circuit of special radio frequency analyses a tool, industry is the famousest is the Eesoft of Agilent, have very good interface with the labour of Mentor.

 

35, high frequency PCB designs 2G above, what regulation should the design of microstrip follow?

 

Line of radio frequency microstrip is designed, need analyses a tool to extract transmission line parameter with three-dimensional field. All regulation should draw the regulation in the tool in this field.

 

36, the PCB to signal of total number word, board go up the Zhong Yuan that has a 80MHz. Besides use silk screen (ground connection) outside, to assure to have sufficient drive capacity, what kind of circuit should still use to undertake protective?

 

Ensure the drive ability of clock, should not come true through protection, use clock drive chip commonly. Worry about clock drive ability commonly, because many clock load is caused,be. Use clock drive chip, turn signal of a clock into a few, use the connection that selects a site. Choose drive chip, besides assure to match basically with load, signal edge satisfies a requirement (general clock is an edge effective signal) , when computational system sequential, should calculate on clock is inside drive chip when delay.

 

37, if use alone clock signal board, use what kind of interface commonly, is the impact that will make sure the transmission of clock signal gets little?

 

Clock signal is shorter, transmission line effect is less. Use alone clock signal board, can increase signal wiring length. And the ground connection power supply of veneer also is a problem. If want Sunday run to transmit, the proposal uses the signal that need branch. LVDS signal can satisfy drive ability to ask, nevertheless your clock is not too fast, not was necessary.

 

38, 27M, SDRAM clock line (80M-90M) , 23 times harmonic just is in these clock lines VHF wave band, the interference after from sink high frequency change is entered is very big. Besides shorten the line is long beyond, still have those tweak?

 

If be harmonic 3 big, 2 harmonic are small, because signal occupies sky comparing,may be 50% , because this kind of circumstance falls, signal is done not have occasionally second harmonic. Need to revise signal to occupy sky comparing at this moment. In addition, to if be one-way clock signal, use a source to carry series connection to match commonly. Can restrain reflection 2 times so, but won’t affect clock edge rate. Source end matchs a cost, can use formula laying a plan to get.

 

39, what is to walk along the develop of the line to attack framework?

 

Topology, some also calls Routing Order, to the wiring order of network of multiterminal mouth connective.

 

40, the develop that how adjusts a line attacks the integrality that will the framework come to raise signal?

 

Direction of signal of this kind of network is more complex, because be opposite one-way, two-way signal, signal of different n sort, influence of develop Chinese hackberrya is different, very Chinese hackberrya of which kinds of develop is opposite it’s hard to say signal quality is advantageous. And when before making, be being emulated, use why to plant develop Chinese hackberrya is very tall to engineer requirement, the requirement is right circuit principle, signal type, even wiring difficulty want to understand.

 

41, how to fold a layer to reduce EMI problem through arrangement?

 

Above all, EMI wants to consider from the system, chan Ping PCB is inextricability problem. Layer change is told to EMI, I think basically is to provide signal method of the shortest circumfluence, reduce coupling area, restrain the interference that need a standard. Additionally layer and power source layer tighten coupling, compare extension of power source layer appropriately, to restraining in all modular interference has profit.

 

42, why should spread copper?

 

General store copper has reason of a few respects. 1, EMC. The land that accumulates to bedding face or power source spread copper, screen action reachs since the meeting, specially, if safety action reachs since PGND. 1, PCB craft asks. Eletroplate to assure commonly the effect, or lamination is not out of shape, less to wiring PCB ply spreads copper. 3, signal integrality asks, give signal of high frequency number a whole circumfluence way, reduce the wiring of dc network. Still have of course medicinal powder hot, installation of special parts of an apparatus asks to spread copper to wait a reason a moment.

 

43, in a system, included Dsp and Pld, what problem should note when wiring excuse me?

 

See the specific value of your signal rate and wiring length. If if signal is when transmission on-line,time of edge of change of Yan Hexin name can be compared, be about to consider signal integrality issue. Additional to many DSP, clock, data signal walks along line develop general to also can affect signal quality and sequential, need attention.

 

44, outside dividing Protel tool wiring, still have other good tool?

 

As to the tool, besides PROTEL, still have tool of a lot of wiring, be like the WG2000 of MENTOR, EN2000 series and Powerpcb, the Allegro of Cadence, the Cadstar of Zuken, cr5000, each has his strong point.

 

45, what is ” of method of “ signal circumfluence?

 

Signal circumfluence method, namely Return Current. Signal of high speed number is in when transmitting, the flow direction of signal is from driver edge PCB transmission line arrives laden, pass the shortest way to return driver to carry by laden edge touchdown or power source again. This is in the ground or on power source return signal to call signal circumfluence method. Dr.Johson explains in his book, high frequency signal is transmitted, it is the process that medium capacitance of Bao Ga charges between pair of transmission line and dc layer actually. What SI analyses is the electromagnetism character of this paddock, and the coupling between them.

 

46, how to undertake to receiving plug-in unit SI is analysed?

 

In IBIS3.2 standard, about at receiving the description of plug-in unit model. Use EBD model commonly. If be special board, be like backboard, need SPICE model. Also can use much board emulation software (HYPERLYNX or IS_multiboard) , build much board when the system, the input receives the distributinging parameter of plug-in unit, get from inside receiving plug-in unit manual commonly. Of course this kind of pattern will be not quite exact, but should be only inside acceptable range can.

 

47, what does the means of termination have excuse me?

 

Termination (Terminal) , also say to match. General according to match the position to divide active end to match with terminal. Among them source end matchs commonly for resistor series connection, terminal matchs commonly for paralell connection, means is more, have pull on resistor, pull below resistor, dai Weina matchs, AC matchs, diode of Xiao Te radical matchs.

 

48, use termination (match) by what element is way decided?

 

Match use means general by BUFFER character, develop general circumstance, n sort and adjudicative kind will decide, also want to consider signal to occupy sky comparing, systematic power comsumption.

 

49, use termination (match) what regulation does means have?

 

Digital circuit is the most crucial is sequential problem, adding the objective that match is to improve signal quality, always get OK and affirmatory signal in the court decision. Effective to n signal, in assure to build, below the premise that holds time, signal quality is stable; Effective to delaying signal, in make sure signal delays monotonicity premise to fall, signal change delays speed to satisfy a requirement. A few materials that Yu Pi distributes are concerned in teaching material of Mentor ICX product. Additional ” High Speed Digital Design A Hand Book Of Blackmagic ” one chapter is opposite technically of Terminal tell about, relate the action of integrality of matched pair signal from electromagnetic wave principle, can offer reference.

 

50, whether does the IBIS model that uses parts of an apparatus undertake emulation to the logistic function of parts of an apparatus? If cannot, so the board class that how has circuit and systematic level are emulated?

 

IBIS model is behavior level model, cannot use at the function to emulate. The function is emulated, need uses SPICE model, model of class of other perhaps construction.

 

51, in the system that coexists in number and imitate, have 2 kinds of processing techniques, one is digital ground and imitate ground departure, be in for instance layer, digital ground is independent ground together, imitate ground is independent together, only place uses connection of magnetism bead of cupreous skin or FB, and power source is not apart; Another kind is imitate power source and departure of digital power source the join that use FB, and the ground is unified. Excuse me Mr Li, is result of these two kinds of methods same?

 

Should saying to be told from the principle is same. Because power source is mixed,the ground is equivalent to high frequency signal.

 

The purpose of divisional imitate and digital part is for interference rejection, basically be the digital circuit interference to imitate circuit. But, break up a likelihood to create signal circumfluence method not complete, affect the signal quality of digital signal, affect systematic EMC quality. Accordingly, no matter break up which plane, want to see such making, whether is signal circumfluence method increased, circumfluence signal has to interference of regular job signal how old. Also a few mix a design now, do not distribute power source and land, when layout, according to wiring of layout of departure of digital part, imitate part, avoid to appear the signal that cross a region.

 

52, bring compasses issue: What is the specific meaning of FCC, EMC?

 

FCC: Committee of communication of United States of Federal Communication Commission

EMC: Electromagnetism of Electro Megnetic Compatibility is compatible

FCC is a standard organization, EMC is a standard. The standard is promulgated have corresponding reason, standard and test method.

 

53, what is meant by poor distributinging line?

 

Difference distributes signal, some also call differential signal, with two just the same, the signal with opposite polarity transmits one a movement in martial arts to occupy, rely on difference of two signal n to have a court decision. Agree to make sure two signal are complete, want to keep collateral when wiring, span of wide, line holds the line changeless.

 

54, what does PCB emulation software have?

 

Copy is a lot of more phyletic really, analysis of integrality of signal of circuit of high speed number emulates an analysis (SI) commonly used software has Icx, signalvision, hyperlynx, XTK, speectraquest. Some also use Hspice.

 

55, how is PCB emulation software to undertake LAYOUT is emulated?

 

In circuit of high speed number, to improve signal quality, reduce wiring difficulty, use commonly multilayer board, allocate special power source layer, layer.

 

56, the stability that how handles ability to assure 50M above signal in layout, wiring?

 

Wiring of signal of high speed number, the key is to reduce the transmission line effect to signal quality. Accordingly, signal of the requirement when the layout of high speed signal of 100M above takes a line as far as possible short. In digital circuit, high speed signal is to use what will limit between signal ascendant delay time. And, the signal of different sort (be like TTL, GTL, LVTTL) , ensure the method of signal quality is different.

 

57, the unit radio frequency part outdoor, intermediate frequency part, and even the share of low frequency circuit that has monitoring to the unit outdoor often uses deploy to be on same PCB, go up character in material to such PCB excuse me have why to ask? How to prevent radio frequency, are intermediate frequency and even low frequency circuit mutual the interference between?

 

Mixture circuit design is a very big question. Have a perfect solution very hard.

 

The veneer that circuit of general radio frequency becomes independent as in the system undertakes layout wiring, can have special screen housing even. And radio frequency circuit is bosseyed or double face plate commonly, circuit is relatively simple, all these are to reduce the effect of distributinging parameter of pair of radio frequency circuit, raise the consistency of radio frequency system. The look is simple to average FR4 capable person, radio frequency circuit board the tendency and the base material that use tall Q value, the dielectric constant of this kind of material is smaller, transmission line distributinging capacitance is lesser, impedance is tall, when signal is transmitted, delay small. In mixture circuit design, although radio frequency, digital circuit is done going up with a PCB, but divide into area of radio frequency circuit and digital circuit area commonly, part layout wiring. Aperture belt and screen box screen pass with ground connection between.

 

58, to radio frequency part, intermediate frequency part and office of branch of ministry of low frequency circuit are on same PCB, what solution does Mentor have?

 

The board class system of Mentor designs software, besides basic circuit design function, still special RF designs module. In module of design of RF principle graph, provide the model of parts of an apparatus that parameter turns, and offer the two-way port that with the radio frequency circuit such as EESOFT the analysis emulates a tool; In RF LAYOUT module, offer the design that is used technically at wiring of layout of radio frequency circuit to edit a function, also have the two-way interface that analyses emulation tool with the radio frequency circuit such as EESOFT, answer principle graph and PCB to analysing the result after emulating to be able to oppose bid. In the meantime, the design that uses Mentor software governs a function, can realize design answer expediently to use, design derive, chime is the same as a design. Mix circuit to design a process quickly greatly. Mobile phone board is typical mixture circuit design, manufacturer of design of very much large mobile phone uses Mentor Jiaanjielun’s Eesoft regards a design as platform.

 

59, be in on 12 PCb board, have 2.2v of layer of 3 power source, 3.3v, 5v, 3 power supply each are made be in, should ground wire manage like where?

 

Say commonly, 3 power source are done respectively in three-layer, better to signal quality. Because appear unlikely,signal crosses planar layer to break up a phenomenon. Cross breaking up is a factor with influence signal very crucial quality, and emulation software is general oversight it. To power source layer and layer, it is equivalent to high frequency signal. Be in actual in, besides considering signal quality, coupling of power source plane (use photograph adjacent ground level to reduce power source plane to communicate impedance) , layer alternate is symmetrical, it is the element that needs a consideration.

 

60, how is PCB checked when leave factory whether to achieve design technology requirement?

 

Manufacturer of a lot of PCB is finished in PCB treatment before leaving factory, want to pass the network that adds report to connect a test, in order to ensure all couplet string is right. In the meantime, more and more manufacturer also use X light to check, the examination etchs or a few breakdown when lamination. To pasting a finished product after treatment board, use ICT to check an examination commonly, this need adds ICT to check a place when PCB is designed. If appear problem, also can pass a kind of special X light to check equipment to eliminate to whether machine a reason to cause trouble.

 

61, the Esd issue that whether also needs to consider chip itself when chip chooses?

 

It is double deck board no matter multilayer still board, answer to increase the acreage of the ground as far as possible. The ESD that should consider chip itself when choosing chip is characteristic, these have commonly in chip specification mention, and although differ of manufacturer same function also meets kind of chip differ somewhat. The attention is added more when the design, of the consideration a bit more comprehensive, the property that makes circuit board also can get certain assurance. But the issue of ESD appears possibly still, because of this orgnaization defend to ESD defending also is quite important.

 

62, when doing Pcb board, to reduce interference, whether should be ground wire formed shut and form?

 

When doing PCB board, will tell commonly should reduce loop area, so that reduce interference, cloth ground wire when, also do not answer cloth is become close form, however cloth Cheng Shuzhi record is better, return the acreage that have even if should increase the ground as far as possible.

 

63, if emulator uses a power source, pcb board uses a power source, whether should the ground of these two power source be together repeatedly?

 

If can use detached power source better of course, because not easy generation is disturbed between such power source, but major facility has particular demand. Since emulator is mixed,what PCB board uses is two power source, the opinion that presses me is ought not to its in all.

 

64, a circuit is formed by a few Pcb board, they whether should in all?

 

A circuit is formed by a few PCB, it is a requirement likely in all, because a few power source are used in a circuit,be not quite actual after all. But if you have specific requirement, can disturb a little bit the conference is small of course with different power source.

 

65, the design holds a product, take LCD, crust is a metal. When checking ESD, cannot pass the test of ICE-1000-4-2, CONTACT can pass 1100V only, AIR can pass 6000V. When ESD coupling checks, level can OK pass 3000V, perpendicular and OK check through 4000V. CPU advocate frequency is 33MHZ. What method can pass ESD test?

 

Holding a product is metallic crust, the problem of ESD is compared certainly apparent, LCD also is afraid can appear more undesirable phenomenon. If do not have method to change existing metallic ability to pledge, suggest to add the material that defend report in orgnaization interior, enhance the land of PCB, think method lets LCD ground connection at the same time. Of course, how to operate should treat specific condition.

 

66, the design contains DSP, the system of PLD, should consider ESD from those respects?

 

Average system will tell, basically should consider the share that human body contacts directly, go up in circuit and proper protection undertakes on the orgnaization. Can cause how old effect to the system as to ESD, that depends on different situation even and decide. Below dry environment, ESD phenomenon will be more serious, more sensitive and elaborate system, the influence of ESD also is met relatively apparent. Although old system sometimes ESD effect is not apparent, but the attention still should be added more when the design, as far as possible nip in the bud.