Analytic active clamp absorb implement circuit and means of its number implementation
[introduction] generally speaking, in high output power source of DC-DC of voltaic segregation type applies in, use synchronous commutator (especially MOSFET) it is mainstream trend. High output electric current still can introduce taller Di/dt on rectifier. To come true efficient, the choice of MOSFET basically depends on guide electrify block and grid charge.
Generally speaking, in high output power source of DC-DC of voltaic segregation type applies in, use synchronous commutator (especially MOSFET) it is mainstream trend. High output electric current still can introduce taller Di/dt on rectifier. To come true efficient, the choice of MOSFET basically depends on guide electrify block and grid charge. However, people notices parasitism body diode reinstates charge reversely rarely (Qrr) and output electric capacity (COSS) . These crucial parameter may increase MOSFET the voltage aiguille on leakage pole and ringing. Generally speaking, as the accretion of rating of MOSFET puncture voltage, guide electrify block also can increase. The article puts forward clamp of active of a kind of numerical control absorb implement. Should absorb implement the voltage aiguille that can eliminate synchronous commutator to go up already and ringing, still can produce design manual effect; Keeping apart type DC-DC converter (if half bridge and complete bridge develop attack structure) in have a variety of other dominant positions, still can raise dependability at the same time, lower fault rate.
Brief introduction
People always hopes to use mean time between failure (the Gao Ke with taller MTBF) relies on sexual power source. Want to make dovish design, can use the switch with rated puncture taller voltage. But do the efficiency with can be lost certain so. Accordingly, efficient often cannot hold concurrently in applying actually with high reliability. Regard new generation power source as the one part of the solution, industrial group is right all the time efficient the demand that converter of segregation type DC-DC is maintaining stability. This uses synchronous commutator in deputy edge with respect to the requirement. The rating of rectifier is aiguille of voltage of parts of an apparatus commonly 1.2 to 1.5 times. Voltage aiguille takes line inductance and rectifier output electric capacity by leakage feeling, parasitism (the syntonic place that COSS) forms is brought about, syntonic peak value may be as high as rectifier stable state double of retrorse voltage. A kind of solution is to use passive to absorb implement appropriative RC1 or RCD2. Although these parts of an apparatus are very popular, but have loss, can bring about efficiency appreciably to drop. Use at making nondestructive absorb implement what partial technology uses is second birth is absorbed implement (like LCD3) , but absorb implement use the switch side Yu Yuan only, perhaps use RC to absorb during mains switch shuts open of and rather than only implement. Other technology 4, 5 apply leak electric energy to come drive is small-sized efficient converter, make a present of enters output voltage terminal. But this requirement uses more cell. Other technology 6 active clamp absorb implement with Yu Quanqiao phase shift develop attacks structure, so that eliminate the resonance that by former edge resonance in application of ZVS soft switch inductance brings about, but be confined to low take sky comparing application.
The article discusses development active clamp absorb implement circuit and means of its number implementation, should absorb implement circuit can avoid voltage deflection, recover loss what can eliminate diode of the parasitism in MOSFET especially reversely, still have a variety of other dominant positions. Converter (only deputy edge) power level sketch map is shown 1 times like the graph.
Graph 1. Power converter deputy edge (the place in the graph is shown for active clamp)
Graph the 1 deputy edge that those who reveal is converter of DC-DC of type of a segregation. Deputy edge is formed by synchronous commutate, synchronous commutate behaves the H- bridge that is join transformer. Still have output filter inductance additionally (LOUT) and output filter capacitance (COUT) . Active clamp switch is MOSFET of raceway groove of a P, the grid drive that is used at changing grid signal n is formed by a capacitance and a diode.
High frequency and equivalent circuit
In high frequency view, big inductance and large electric capacity are in open circuit and short circuit condition respectively, parasitism and syntonic inductance and electric capacity are used only in circuit analysis. Use this kind of method to be able to simplify circuit, so that analyse alternating current. This method is special apply to syntonic develop to attack structure and use absorb implement circumstance, because be in amortize cycle, high frequency electric current can choose the route of impedance lowest.
The communication view of circuit is shown 2 times like the graph. Inductance of output filter wave and capacitance are in open circuit and short circuit condition respectively. In circuit, the output electric capacity of MOSFET and inductance of leakage of electricity keep unvarnished. The key is the deputy edge of converter, because of source of former edge voltage already short circuit and bisect analyse is useless.
Graph 2. (left) power converter view of deputy edge AC (the place in the graph is shown for active clamp) (right) simplifying AC view.
Clamp of synchronous FET active the working principle of circuit
In the analysis, we assume, absorb implement electric capacity is sufficient big, can maintaining voltage is constant and changeless. In clearance of follow on current (in the graph 3 in, SR1 and SR2 all open) , switch of 4 deputy edges (MOSFET) all open. Suffer finite rise and decay time and the influence that defer of transmission of grid drive signal changes, synchronism is put in shorter dead band time from beginning to end between rectifier signal. During blamed area time, the parasitism diode of MOSFET can guide with follow on current. It is next half switch cycle ever since, right now, another of former edge MOSFET brings a foot to start. This meeting brings about the polarity on transformer winding to produce change, shut synchronous commutator at the same time body diode. However, should reinstate charge reversely only (Qrr) is not extinct, the parasitism diode of synchronous MOSFET won’t be shut. Direction is shown 2 times like the graph. This Qrr is regarded as the redundant electric current that reflects former margin from transformer as forward position aiguille. This still can increase synchronous MOSFET the voltage aiguille on leakage pole. Restore the size of charge to get by computation leaving type reversely:
Graph 3
Graph 4a. Trr interval captures the working circumstance during regaining energy reversely
Graph 4b. The energy that releases in load
Inductance of leakage of electricity and inductance taking a line (polarity is shown 2 times like the graph) the voltage aiguille that bring about by active clamp absorb implement absorb. Active is absorbed implement switch can be after parasitism diode open when ZVS open. However, when active clamp absorb implement when open, absorb implement capacitance can be absorbed restore electric current reversely and electric energy in new infuse deputy bridge and load. Because pass,absorb implement the only electric current of capacitance is 0, want converter to work to fall at stable state only so, absorb implement can maintain charge balance.
Design a guideline
1.Inductance of estimation leakage of electricity
Let converter be in without absorb implement the job below the condition, measure synchronous MOSFET the syntonic frequency of aiguille of voltage of the ringing on leakage pole and cycle (F1) . Additional, the forward position aiguille that measures weaveform of former edge electric current to go up (should be equal to Trr) . Want inductance of estimation leakage of electricity, should make the given value of capacitance (C2) leaks than MOSFET at least extremely / source pole electric capacity is large an amount class. Measure ringing frequency with next type (F2) , computational capacitance (COSS) and leakage of electricity (LLK) inductance:
2.Choice active clamp absorb implement capacitance
The choice outputs capacitance to output capacitance for synchronous MOSFET at least 10 to the absorption of 100 times implement capacitance. Because active is absorbed,this is implement switch can have way of a low impedance. However, absorb implement the choice of capacitance must accomplish:
Among them, ts is switch cycle.
Active clamp opens below condition of following the least delay absorb implement:
The drive signal rise time of these two transmission defer that are driver and former edge MOSFET. This sequential is very important, because must capture,regain energy of MOSFET body diode reversely entirely. This time depends on synchronism restores character of MOSFET body diode reversely (Qrr, Trr, Irr) , the temperature that goes up possibly along with parts of an apparatus, load current and retrorse voltage wait for an element and change. Defer time and absorb implement guide connect time to be able to narrate a method to install the switch character that differs with be aimed at accurately to undertake optimizing with article place.
Firm grip another kind of method that capacitance is worth is to use the following formula. This formula is based on syntonic cycle, during this, release electric energy of leakage of electricity clamp in capacitance.
The limits of this value is:
To avoid to be in observe on 1 o’clock overmuch ringing, guide a time should not exceed or two resonance are periodic, otherwise, can appear overmuch successive ringing. Or, absorb implement guide connect time to be able to be taken above of the forward position aiguille that observes in 1 o’clock guide the approximation that tells time (like Trr) . Guide telling time is to be able to bring about energy only too much again syntonic a few cycle, this can see in weaveform of former edge electric current (graph 8 with the graph 9) .
3.The choice is absorbed implement switch
(One of 1) simplifies version is to use the poorest condition in MOSFET data manual to be restricted to be worth. More detailed ground developed the following formula the circumstance of the electric current in capacitance:
Use factor 2 because of the consideration is half switch cycle only,be, attack to complete bridge or half bridge develop structure, this process occurs twice. Additional, in the graph 1 in, because two switch are shut, restore charge to be able to increase one times reversely so. Accordingly, total electric current is:
Among them, in complete bridge configuration falls, c is 2; In central take a percentage of a deal configuration falls, c is 1; N is shunt-wound MOSFET amount. This is to pass active to absorb implement the average electric current of switch.
The number comes true
Active clamp absorb implement digital fact has two control: Control 1 it is to absorb implement defer (the absorption from trigger edge implement in PWM edge adjustable defer) . Control 2 to absorb implement PWM guides a time. Spark the logistic OR that the dot draws ascendant follow of PWM of crural former edge for H bridge subtense (like OUTC and OUTD) . Absorb implement PWM does not ask to resemble advocate accuse the resolution with PWM euqally high resolution (like 125 Ps) . Result, spark what need clock to be able to support slower rate (5 Ns resolution) , such returning can energy-saving (40 times coefficient) . This one concept also can apply the power that has central take a percentage of a deal to deputy edge to change develop to attack structure. Additional, this concept also can be used at individual switch, in these switch, the meeting on every power transistor places clamp of active of type of a schism switch is absorbed implement unit. Below this kind of circumstance, active clamp the fall that the drive signal of FET takes motor synchronizing commutator along.
Graph 5. Absorb implement the number of PWM comes true
ADP1055 number controller provided the necessary tool that achieves this one goal. The graphical user interface with intuitionistic and simple have the aid of, need a few minutes to be able to finish active clamp only absorb implement optimize. ADP1055 offerred two option to install absorb implement PWM, the logistic combination that passes SR1 and SR2 namely or the logic that carry OUTC and OUTD signal are combined. Below two kinds of circumstances, can absorb with two option configuration implement PWM, if pursue 6 with the graph 7 are shown. Below afore-mentioned all scenes, can use absorb implement defer (time of setting dead band) and absorb implement guide fine tuning optimizes a time parameter. The logic of two signal combines have the aid of to choose a function with polarity, the user can choose proper absorption freely completely implement combination.
Graph 6. Use option 1 (SR1 and SR2) absorb implement sequential
Graph 7. Use option 2 (OUTC and OUTD) absorb implement sequential
Complete bridge develop attacks experimental result of the structure
To undertake experimental test and verify, the converter of segregation type DC-DC of the choice, its are rated the input is 48 V, rated output is 12 V, 20 A, switch frequency is 125 KHz. Develop attacks the structure is complete bridge, take a deputy side, if pursue,1 is shown.
Graph 8 revealed use incorrect absorption implement guide connect time to be able to bring about redundant ringing, the oscillation that still revealed synchronous MOSFET at the same time leakage pole voltage, latter also is mirrorred in former edge electric current. Forward position aiguille is very serious also, can bring about needless EMI.
Graph 8. Absorb too much implement guide a time
The graph is shown 9 times absorb for what optimize implement guide a time, among them, the leakage in synchronous MOSFET extremely ringing is not had on voltage. In the meantime, forward position aiguille also was eliminated almost.
Graph 9. Optimized absorption implement sequential
The graph is shown 10 times be in for synchronous MOSFET active clamp absorb implement the leakage below nonexistent condition extremely voltage. Voltage deflection may be very serious, amount to 1.5 times of stable state voltage, and MOSFET enters avalanche condition likely.
Graph 10. Nonexistent active clamp absorb implement
The graph is shown 11 times for active clamp absorb implement effectiveness. Forward position aiguille is eliminated completely, MOSFET leaks extremely on without ringing.
Graph 11. Existence active clamp absorb implement
Graph 12. The absorption below 0 A laden condition implement effectiveness
Green line: SR leaks extremely, 10 V/div
Blue line: Clamp FET grid – source pole voltage, 5 V/div
Huang Xian: Load current, 10 A/div
Graph 13. The absorption below 20 A laden condition implement effectiveness
Green line: SR leaks extremely, 10 V/div
Blue line: Clamp FET grid – source pole voltage, 5 V/div
Huang Xian: Load current, 10 A/div
Half bridge develop attacks experimental result of the structure
Half-and-half bridge develop attacks the structure undertook additional experimental test and verify, rated input is 48 V, rated output is 9 V, 200 W, switch frequency is 180 KHz.
Graph 14. Active clamp absorb implement ban with
Red line: SR1 leaks extremely, 5 V/div
Blue line: SR2 leaks extremely; 5 V/div
Green line: Absorb implement PWM, 5 V/div
Graph 15. Active clamp absorb implement make can
Red line: SR1 leaks extremely, 5 V/div
Blue line: SR2 leaks extremely; 5 V/div
Green line: Absorb implement PWM, 5 V/div
Graph 16. Active clamp absorb implement below the condition soft the SR leakage during starting is extremely undee
Huang Xian: Absorb implement FET grid – source pole voltage, 5 V/div
Red line: SR1 leaks extremely, 10 V/div
Blue line: SR2 leaks extremely, 10 V/div
Green line: Output voltage, 2 V/div
Graph 17. Active clamp absorb implement below the condition soft the SR leakage during starting is extremely undee
Huang Xian: Absorb implement FET grid – source pole voltage, 5 V/div
Red line: SR1 leaks extremely, 10 V/div
Blue line: SR2 leaks extremely, 10 V/div
Green line: Output voltage, 2 V/div
Graph 18. The SR in process of short circuit test leakage pole voltage
Huang Xian: Load current, 5 A/div
Red line: SR1 leaks extremely, 10 V/div
Blue line: SR2 leaks extremely, 10 V/div
Green line: Output voltage, 2 V/div
Layout consideration
The graph is shown 8 times attack for afore-mentioned half bridge develop structural layout. Crucial point is through shortening annulus road or its limitation is in narrower area, reduce grip the parasitism inductance of annulus road. Can reduce grip otherwise effectiveness, be in clamp high frequency ringing is brought about inside cycle.
Graph 19. Active clamp absorb implement layout
Conclusion
The article revealed active clamp absorb implement circuit is keeping apart electric current of high output of type DC-DC converter to apply medium number to realize way. The active that put forward – clamp plan has a variety of advantages, for instance lower clamp voltage, can reduce tension of MOSFET rated puncture, improve efficiency thereby. Still eliminated ringing at the same time, the result can reduce electromagnetism to disturb (EMI) . This is the simple circuit of a kind of low cost, drive plan is very simple also. Additional, absorb with the other active that needs additional inductance implement photograph comparing, still can save PCB board space. whole, the dependability of power source got promoting considerably. In addition, eliminated forward position aiguille, the result reduced the pressure to former edge switch. Additional, taller efficiency can reduce calorific amount, of this hot to coming loose difficulty suffer be restricted the module in area is very useful.
ADP1055 number controller provided the necessary tool that realizes afore-mentioned tasks, need not write complex program or code. ADP1055 still supports a variety of other functions, for instance black box, soft stop, the command is code of attack by surprise, nonlinear gain.