Brief introduction

Large clock establishs the transmission line that uses a variety of types, span many circuit board and many coaxial cable, adopt way of many clock parts of an apparatus by the circumstance of clock signal not scarce. Although use optimal practice method, in these medium any one kind may bring the phasic deviation that is more than 10 Ps. However, in a few application, bell signal realizes the error that is less than 1 Ps when need is all. Application of wh some of which includes to accuse blast, battle of MIMO, radar, electron (EW) , millimeter wave is become picture, microwave is become picture, radio of appearance and software definition (SDR) .

 

The article pointed out the likelihood in designing process, production process and applied environment brings about 1 Ps or above the issue of a few care of phasic deviation. To these care issues, the article will offer a few proposals, give typical examples and experience rule, help reader knows the prime cause of phasic deviation and extent intuitionisticly.

 

The defer equality of transmission line

Listed equality is used at estimation here the transmission defer (of individual clock methodτThe metabolic value of Pd) and the transmission delay that because many clock transmit way or ambient conditions change,cause is in application of large clock tree, clock takes the one part that the Δτpd between the line is deflection of total system clock. Equality 1 with equality 2 offerred two advocate variable, they use at controlling the τpd of a transmission line: The physical length (of transmission line? ) with (of effective dielectric constant? Eff) . To equality 1, vp shows rate of transmission line photograph, VF expresses rate factor (%) , c represents velocity of light (299, 792, 458 M/s) .

 

 

Equality 3 computation does the increment between two transmission line transmit defer (? τpd)

 

 

Data of report of transmission line interpose has the character that follow temperature and changes. The temperature coefficient of dielectric constant (does TCDk) use phasic variation normally (Δ ? The relation curve of Ppm) and temperature expresses, the unit is 1/1000000 (Ppm) ; Among them Δ ? What Ppm value falls for target temperature is phasic with fiducial temperature (it is 25°C normally) the phasic poor value below. Foregone temperature, Δ ? When Ppm and transmission line length, equality 4 use at estimation to transmit the defer posture change to fiducial temperature.

 

 

Data of report of coaxial cable interpose has the character that bend because of cable and changes. Cable bent radius and angle decided the change of effective dielectric constant. Popularly, through comparing specific cable bent phasic with linear cable phasic, express its to be phasic change (Δ ? Deg) . To foregone Δ ? Frequency of Deg, signal (F) and cable bend, equality the 5 variation that are used at estimation to transmit defer.

 

 

Defer change note

The choice of transmission line

Proposal: Go to be in many optimal defer is obtained to match the result between the line, be about to match line length and transmission line type.

 

Experience law:

 

1mm differs between two length taking a line, be equivalent to Δτpd ~6 Ps (6mil differs to be equivalent to Δτpd ~1 Ps between two length taking a line) .

Banding the line compares microstrip line or conductor carries line on the back in all face wave guide (CB-CPW) makes an appointment with 1 Ps/mm slow.

Does different transmission line type meet what generation differs? Eff and Vp. Use equality 2, this means the different transmission kind with physical same length to have different τpd. Watch 1 with the graph 1 provided 3 kinds of common transmission line (line of CB-CPW, microstrip and banding line) emulation result, highlighted? The difference between Eff, Vp and τpd. Should emulate estimation to get, take a line to 10 centimeters CB-CPW, what τpd compares identical length is banding the line goes line big 100 Ps. Copy is the microwave impedance calculator that uses Rogers Corporation really (Microwave Impedance Calculator) generates.

 

Express 1. Graph 1 medium Rogers 4003C emulates a result

 

 

The (of opposite magnetism conductance of Rogers 4003C? R) , also call dielectric constant (Dk) , for 3.55. Attention, in the watch 1 in, of CB-CPW and microstrip line? Eff is inferior, because they are exposed,be under air, and airy? R = 1.

 

Perhaps should use same sort in same layer model the signal that transmission line will come to to ask to those delay time matchs has a line always can not come true. Express the 2 a few general elements that offerred consideration of the need when walking along a line to select transmission line kind to differ. If need to match the τpd of type of diverse transmission line, circuit board emulates a tool and had better be being used is not the hand changes computation and experience rule.

 

Express 2. The consideration element of broad sense transmission line
 

 

Graph 1. Match transmission line type.

 

Transmission line crosses aperture

Proposal: If signal method has had opening, when remembering transmitting defer in computation please, want to consider the length crossing aperture between layer of two targets signal.

 

If be defer of cursory consideration transmission only, join suppose the length crossing aperture of two signal layer is as identical as transmission line on phasic speed. For example, join 62mil is thick board of coping and bottom signal layer cross aperture to will occupy additional τpd ~10ps.

 

Photograph adjacent walks along the line, signal that need branch and sheet to carry signal

Proposal: Going keep least between the line width of a line, avoid to be in? Eff appears to change significantly.

 

Experience law:

 

100 Ω difference distributes signal (strange mode) faster than 50 Ω Chan Duanxin date.

Sheet of concentrated inphase 50 Ω carries signal (occasionally mode) than Chan Duanxin of individual 50 Ω date is slow.

Can be the signal way that concentrated photograph adjacent takes a line changed? Eff, and can be changed consequently wait grow the defer between the line to match. Graph 2 with the watch 3 in the emulation case that provided line of microstrip of two brims coupling to walk along line and individual microstrip line to take a line. Should emulate estimation, the τpd that mode of even number of coupling of two 10 centimeters of brims takes a line is longer than waiting independence is individual take a line big 16 Ps.

 

When τpd of τpd of attempt general Chan Duan and poor cent matchs, important is the phasic speed that emulates two method. In clock application, send when the attempt as referenced as poor cent or clock signal time is right when neat CMOS synchronism or SYSREF request signal, may appear this kind of circumstance. Increase the removed meeting between method of the signal that need branch to divide the phasic rate that signal and Chan Duanxin produce to be close to more between date to match in difference. However, this is distribute signal in order to differ in all modular noise restrains those who be cost, latter effect is to make clock shakes maintain in minimal.

 

Likewise important is, we need to point out, concentrated inphase signal (even mode) can you increase? Eff, bring about τpd to lengthen thereby. When the many copy that carry signal when sheet take a line thick and fast, the result can produce this kind of situation.

 

Express 3. Photograph adjacent walks along line and segregation to take a line
 

 

Graph 2. Photograph adjacent walks along line and segregation to take a line.

 

Defer matchs the relation with frequency

Proposal: Reduce frequency for utmost ground relevant defer matchs an error, choose factor of low Dk, small loss please (the material of DF) (Dk <3.7, DF <0.005) . DF also calls loss horn tangent (Tan δ) (see equality 6) . Take a line to much GHz, avoid to use those who contain nickel to eletroplate please technology.

 

Through offsetting change is measured, will different frequency marries the delay time between signal Ps level to be not easy thing. Graph 3 show the addition as frequency, dielectric constant connects regular meeting to reduce. Be based on the equality above 1 with equality 2, as the addition of frequency, the τpd meeting decrescent that this kind of behavior produces. Be based on equality 3 with the graph 3 medium Roger material, 1 the line takes in 10 centimeters, the Δτpd between 1 GHz and wave of 20 GHz sine is 4 Ps about.

 

Graph 3 show at the same time, signal attenuation increases as the addition of frequency, compare with foundamental tone photograph, bring about an attenuation of harmonic of wave height rank to increase. The degree of wave of this kind of filter can bring about rise time (τR) and decay time (of τF) different. The change of rise time and decay time can behave the change on weaveform to affect succeed to accept parts of an apparatus, reflect thereby in total when delay parameter to go up, total defer is formed by the τR/2 of the τpd that takes a line and signal or τF/2. Additional, the square wave of different frequency has group of different delay possibly also. As a result of these reasons, when reckonning the defer between different frequency matchs, square wave has challenge sex more than sine wave.

 

To understand attenuation better (the α that is an unit with DB/ft) the relation with frequency, ask referenced equality 7 with equality 8 and the reference material that provides in the article 2, 3, 4, 5, introduced loss horn tangent among them (δ) and collect skin effect. A key of these bibliographical reference is nodded is collect skin effect reduced equality 8 medium areas (A) , the result increased circuit resistance (R) . 3 cause excessive attenuation to avoid effect of skin of high frequency collect, do not use plating nickel technology please, for example model of aureate solder attack by surprise (SMOG) eletroplates technology and gold of dip of chemical plating nickel (ENIG) eletroplates technology. 4, 5 avoid use nickel eletroplate an example of the technology is model of attack by surprise of naked copper solder (SMOBC) technology. Altogether, choose the material of low Dk/DF, avoid use nickel eletroplate technology, take a line in the key board class defer emulates aspirant travel circuit, the defer that improves different frequency thereby matchs.

 

 

Graph 3. The relation of Dk and DF and frequency.

 

Defer matchs the relation with temperature

Proposal: The interpose report data that stabilizes for PCB and cable choice temperature. The Δ of data of report of temperature stability interpose? Ppm is less than 50 Ppm normally.

 

Dielectric constant changes along with temperature, cause the change of transmission line τpd. The dielectric constant change that 4 computation cause as a result of temperature change causes equality thereby when the metabolic Δτpd that delay.

 

Normally, PCB material cent is two kinds: Fibre glass fabric (WG) and without spin glass. As a result of vitreous Dk = 6, because of this fibre glass normally cheaper and Dk is taller. Graph the 4 Dk that compared all sorts of different data change. Graph 4 show, a few material that are based on PTFE/WG are compared in the TCDk between 10°C and 25°C abrupt.

 

Use equality 3 with the graph 4, expressed 4 computation to give on different PCB material 10 centimeters banding the line goes a line to come at 25°C in temperature the Δτpd when changing between 0°C. In the system that crosses many to walk along a line to match τpd below different temperature in need, the option of PCB material may leave the τpd that second of a few skins brings about between the line to break in 10 centimeters match.

 

Data of report of coaxial cable interpose also has similar TCDk problem. Coaxial cable walks along a line to grow more than PCB normally, this will be brought about in whole temperature limits get much Δτpd greatly. Turn into from 25°C when temperature when 0°C, use with the watch the 2nd 4 τpd that show two property is same 1 rice cable to may produce 25 Ps are broken match.

 

When expressing 4 hypothesis to walk along line length to be 10 centimeters, temperature is constant and constant. In actual condition, temperature takes a line in whole or the likelihood on coaxial cable is not constant, the circumstance that makes must discuss above analytic comparing wants a few more complex.

 

Graph 4. The relation of Dk change and temperature.

 

Express 4. 10 centimeters banding the Δτpd of the line, 25°C comes 0°C

 

 

Defer matchs cable

Proposal: Understanding buys defer to match cable and development calibration program to match the cost balance between these two kinds of means to concern with adjusting defer to break through electronic means.

 

According to the author’s experience, compare the coaxial cable of the identical length that same supplier offers and material, can discover defer is broken deserve to come in 5 Ps between 30 Ps. From the point of the discussion with cable supplier, this one span is the result that cable cut, SMA is installed and changes between Dk batch.

 

A lot of coaxial cable manufacturer are being offerred phasic match cable, its are booked match defer window to be 1 Ps, 2 Ps or 3 Ps. As the addition of defer match accuracy, the value of cable also can increase normally. Match the cable of <3 Ps to make delay, manufacturer connects regular meeting to increase a certain number of defer to measure in cable production process with cable cut measure. To cable manufacturer, the measure that these addition can bring about production cost to increase and lower yield.

 

Defer matchs to bend with cable

Proposal: When choosing cable material, the defer deflection that because temperature is caused,wants understanding and cable curve the balance relation between the defer deflection that cause.

 

Curve coaxial cable to be able to cause different signal delay. The data manual of cable supplier can set to the phasic error when 90° bends below specific radius of bend and frequency normally. For example, spend for 18GHz, angle of bend in frequency when be 90° , rated and phasic change may be 8° . Use equality 5, the delay that computation obtains is 1.2 Ps about.

 

Defer matchs the installation with SMA and choice

The change when SMA of PCB brim installation is being installed can raise the defer between clock method to break match, if pursue,5 are shown. Won’t measure the error of this kind of property normally, quantify very hard accordingly. But, we can assume reasonably, this may be broken in the delay that 1 Ps adds to 3 Ps between clock method match.

 

Graph 5. SMA installation defer is broken match.

 

Controlling SMA to install the delay that cause to break a kind of method that match is the SMA that chooses to have pair of neat character, if pursue,6 are shown. Because have the rated frequency that aims characteristic SMA,normally prep above did not aim characteristic SMA, cost is accordingly higher, existence is eclectic between both. SMA supplier often is more high-frequency SMA offers commendatory PCB to blast off to SMA board layout. This commendatory layout itself is worth likely to pay additional price, because can save circuit board so,edit cost, when clock frequency is more than 5 GHz, especially such.

 

Graph 6. Have the SMA of pair of neat character.

 

The defer that crosses many PCB matchs

Proposal: Does understanding buy batch? The PCB stuff with R good control and development calibration program compound the cost balance concern between these two kinds of means with adjusting defer to break through electronic means.

 

Try to go up in many PCB go τpd matchs to be able to add a certain number of error sources between the line. 4 errors source discussed above: Defer matchs with temperature; Defer matchs cable; Defer matchs to bend with cable; And defer matchs the installation with SMA and choice. Is source of the 5th error? R changes in what bring about because of craft on many PCB. Contact PCB manufacturer, in order to understand? The craft of R changes.

 

As an example, of FR-4? R may be in 4.35 to 4.8 between change. 6 what grow to on different PCB 10 centimeters is banding the line takes a line, below extreme circumstance, this limits can produce the Δτpd that is as high as 35 Ps. The data data manual of other PCB offers? R typical scope is less. For example, the data manual of Rogers 4003C says, its? The limits of R is 3.38±0.05. Banding to 10 centimeters on different PCB the line takes a line, below extreme circumstance, this limits can fall likely Δτpd to 9 Ps.

 

The phasic error that time IC causes

Proposal: Consideration deviation adjusts the new-style PLL/VCO IC of extent <1 Ps.

 

In the past, data converter clock is built from parts of an apparatus of many output clock. The data manual of these clock parts of an apparatus set the phasic deviation of parts of an apparatus, limits comes for 5 Ps normally 50 Ps, specific depend on chooses IC. Know according to author place, the IC of clock of GHz of all much output on the market when drafting definitive edition language does not have the capacity that adjusts clock defer to every output.

 

Gain ground ceaselessly as the frequency of data converter clock that is more than 6 GHz, sheet is outputted or double output PLL/VCO will become first selection clock. Sheet outputs the advantage of framework of PLL/VCO clock IC to depend on, people is developing a few methods, so that grow with the pace of <1 Ps,adjust the defer that referenced input outputs to clock. Adjust reference to input the defer of output to every clock, this kind of ability allows final user to carry out systematic level calibration, will phasic error is the smallest change 1 Ps the following. Phasic deviation calibration reduces level of this kind of system likely all PCB that alleviate in the article, cable and connector defer match a question, reduce integral BOM cost of the system thereby.

 

Conclusion

The article discussed a possibility defer change and defer lose a few kinds of source that match. Discuss make clear, ? Eff may follow type of temperature, frequency, craft, transmission line and circuit span and change. Make clear at the same time, through coaxial cable connective much PCB equipment can generate additional defer change source. Should choose material with the smallest when the phasic deviation that changes big clock tree, must we understand PCB and cable? R follows the pattern that temperature, craft changes with frequency. To all these variable, if do not have calibration of some kind of deviation, very bad design deviates the big clock system of <10 Ps. In addition, buy PCB material, coaxial cable and SMA connector to reduce phasic deviation to be able to increase cost of material significantly with utmost ground. To simplify calibration method reduces systematic cost, a lot of new-style PLL/VCO that IC manufacturer offers and clock parts of an apparatus can come true to adjust ability under the defer of 1 Ps.

 

Express 5 summary the article is aimed at the smallest the proposal that change phasic deviation and discusses.

 

Express 5. About the smallest the proposal brief summary that changes phasic deviation (divide by the theme)