[introduction] Chinese letter connects a courtyard ” data center white paper 2022 ” the report shows, dimensions of market of global data center exceeded 67.9 billion dollar 2021, relatively grew 9.8% 2020. Change a trend to strengthen as data video, and long-range office popularizes degree to rise, data center market appears the trend that gives steady growth. But the explosive style that this also brings couplet net data grows, pose enormous challenge to the data processing ability of data center. All sorts of acceleration plan makes the application with data indispensable center consequently.

Data center quickens a solution

Chinese letter connects a courtyard ” data center white paper 2022 ” the report shows, dimensions of market of global data center exceeded 67.9 billion dollar 2021, relatively grew 9.8% 2020. Change a trend to strengthen as data video, and long-range office popularizes degree to rise, data center market appears the trend that gives steady growth. But the explosive style that this also brings couplet net data grows, pose enormous challenge to the data processing ability of data center. All sorts of acceleration plan makes the application with data indispensable center consequently.

In data center, quicken chip to basically apply at 3 respects: Computation, memory and network. Among them, traditional GPU chip, and burgeoning DPU, APU quicken chip to be able to resolve one part demand, remain very big one part accelerates requirement is to be based on FPGA to solve.

Forecast in what put forward 2019 according to Semico Research, 2018 – global data center blocked market dimensions to will come from growth of 2.84 billion dollar quickly 2023 21.19 billion dollar, year compound increase rate is as high as 49.47% , FPGA is to be added among them fast the fastest fractionize product, demand basically comes from load of company level work to expedite application.

We come to the article specific look, why can FPGA quicken a domain to get in data center run? What does specific advantage have? Recommend net of official of trade lustre electron for everybody the can be used at data center to quicken FPGA product that making work.

Why FPGA suits data center to quicken

In plan of deploy of conventional data center, computation and data processing are finish by CPU, memory and network resource also are undertake deploy around CPU. However, as a result of the outbreak of artificial intelligence and market of content couplet net, data bulk of high in the clouds shows exponential level growth, CPU becomes systematic dimensions and the bottleneck that efficiency promotes, the high-powered chip such as GPU, FPGA, ASIC begins to swarm into data center market, among them the typical product configuration of FPGA gets stuck quickly namely.

Nevertheless, to FPGA product, data center is a newer applied field. For instance, the Sailingsai that has been bought by AMD is in beginning just announced formally 2018 ” data center is first ” development strategy. But, depending on Gao Tun to say the natural dominant position with low defer, plus deploy agile, once use,FPGA is in data center rapid predominate accelerates plan.

In data center application, FPGA can reduce the task burden of CPU in the round, include computation, memory and network. The model of conventional data center is to be based on CPU group compose to build, precious CPU kernel is used up to danger, the network interface controller that provides around CPU (NIC) etc preliminary alleviate resource is inextricability also basic problem. The system of different form calculation that is based on FPGA begins to show an advantage right now, according to the data that Microsoft Catapult project publishs, the server that is used at should searching engine file to rank operation surely through FPGA correspondence is done quickly, won the handling capacity promotion of 95% , handle what answer surely to defined algorithmic speed to raise 40 times oneself, accelerate the effect remarkable.

Graph 1: FPGA accelerates the search sort process that answers surely

(graph source: Microsoft technology white paper)

Analyse Microsoft Catapult project to be able to discover, the hardware accelerator of data center needs to satisfy a few requirements:

One, need is had flexibility and but expansibility, with the cloud computation is the data center that basically serves kind, the job that its need to handle is unfixed, face different task, accelerator wants to be able to freely the ground is answered entirely;

2, need has hardware resource fictitious the ability that influence, be the same as compose in order to finish to run paralell with what have data center, and the modification that does not need to undertake bold and resolute to having a framework;

3, the capability that needs to have analytic inference, promote bigger application the fault tolerance rate of model deploy.

Program trader discovers after evaluating all sorts of hardware accelerator, FPGA photograph relatively at other hardware, can provide higher performance, better real time sex, and enough flexibility, can do in time according to prospective algorithm and demand change adjust. And, FPGA is fictitious the software framework that change and interface resource promoted the property is the same as compose with existing operation system considerably, clear cost advantage is had when plan upgrades.

We see have representative case again — Yamaxun AWS F1, be based on FPGA to undertake acceleration a service to communal cloud. AWS F1 example optimized FPGA to serve the soft hardware function that quickens a respect in the cloud further, the user that main reason is communal cloud does not resemble demesne cloud user is same, have actual strength of powerful technical research and development, can get the certain support of FPGA manufacturer. Accordingly, in AWS F1 project, yamaxun will be rock-bottom the logistic resource abstraction of FPGA, make the user does not need to worry about the detail problem such as interface resource and IP deploy, with complete FPGA at the same time tool of development form a complete set helps an user realize what correspondence uses program to quicken.

AWS F1 reflected Yamaxun better the height of FPGA is custom-built change, this also is the natural advantage of FPGA actually, this kind but editorial character namely above mentioned flexibility, individual FPGA can apply new configuration according to all sorts of unused, need not turn specific hardware into ASIC, the user can be in each crucial link such as machine study, network, safety use FPGA.

Besides international manufacturer, the market serves in Chinese cloud, FPGA is wide also welcome. Current, the domestic cloud such as cloud of A Liyun, Tecent, Baidu cloud serves a company to had quickened a respect to choose FPGA in hardware. For instance, we see Tecent ever rolled out server of cloud of FPGA of infrastructure of calculation of form of first high-powered different of domestic 2017, this cloud server that uses framework of different form calculation relatively at traditional CPU server, function promotion is in 30 times above. The concept with Yamaxun is similar, pass server of cloud of this kind of FPGA, tecent will have big company ability only the FPGA of quite long-term deploy leads masses market. Current, in the hardware infrastructure of Tecent cloud, FPGA has been in computation, network, memory 3 big important node are appropriative accelerator part.

Big plant of mainstream cloud service makes to the support of FPGA FPGA rises abruptly quickly in market of domestic data center.

According to Frost&Sullivan data, chinese application got the dimensions of FPGA chip market of region to make an appointment with 1.61 billion yuan at data center 2020, 10.7% what hold share of market of Chinese FPGA chip, predict 2021 – 2025 year all compound add fast will achieve 16.6% . Can see, the acceleration as FPGA can be obtained in data center approbate, the market of this domain adds future fast very fast.

Of course, what must want to explain is, in data center market, FPGA and accelerator of other and all hardware are not CPU ” revolutionary ” , however cooperation person. Future is calculated as data center body is measured and complex spend promotion, the energy of CPU will be increasing those who be centered in complex task attemper and handle, the task of repeatability and local sex is transferred will more large-scaly from CPU. And FPGA can take in and send out in large quantities process designing, high by right of what afore-mentioned mentioning, the character of low defer, will assume more acceleration the task, the artificial intelligence application that waits for a model for machine study is endowed with can.

As similar as FPGA flexibility is, trade lustre electron also provided the retrieval of agile diversity and terms of payment for the engineer, yuan of parts of an apparatus that helps an engineer purchase good product quickly to develop place to need, promote research and development efficiency thereby. Next, we recommend the FPGA product that platform of electron of a few trade lustre is making work for everybody, they are the ace that hardware quickens a respect.

FPGA of industry head money blocks supportive software to define hardware quickly

In data center domain, FPGA blocks the product configuration that is a kind of model quickly, the system that implemented to be based on FPGA is compositive. With traditional FPGA development board differs, FPGA gets stuck quickly is more whole systematic level program. Is the first product that we bring for everybody the Alveo that comes from manufacturer AMD? SN1000 SmartNIC gets stuck quickly, on net of official of trade lustre electron, the makings date of this parts of an apparatus is A-SN1022-P4E-PQ.

Graph 2: SN1022-P4E-PQ

(graph source: Trade lustre electron)

Alveo? SN1000 SmartNIC acceleration gets stuck is a SmartNIC that offers software to define hardware to quicken, compositive in single solution network join, computation and memory quicken a function, implementation faces the task burden of data center domain to transfer. And, as a result of FPGA but process designing is characteristic, this blocks support quickly all sorts of extensive custom-built uninstall, include to support a client compose is built and tripartite is uninstalled.

Alveo? SN1000 blocks offerred hardware resource to include quickly:

● PCIe Gen 4 X8 or Gen 3 X16

● Cable of copper of 100G QSFP28 DA or fiber-optic send and receive implement

● Be based on XCU26 (XCU26-L2VSVA1365E) FPGA, use framework of Xilinx 16nm UltraScale+

● Board carry CPU: Kernels of 16 64 Arm Cortex-A72, frequency is 2.0GHz, have 8MB cache

● A 4GB X 72 DDR4-2666 (processor)

● 2 4GB X 72 DDR4-2666 (FPGA)

● Total intelligence blocks load: 75W

● 70W heat designs power comsumption (TDP)

● Passivity comes loose hot

Be in but process designing respect, alveo? SN1000 quickens card to support comprehensive agreement class to uninstall quicken method of custom-built, special data and process designing of convenient P4 advanced language, offer P4 tool to cover a Vitis Networks, can let the client is uninstalled from the definition and be adjusted existing uninstall, in order to process new agreement and application, and need not change hardware. The hardware of these custom-built sexes includes quickly: Open mode VSwitch and fictitious change quickly (Virtio.net) the network is quickened; IPsec, KTLS and SSL/TLS safety are quickened; The Virtio.blk, NVMe that is based on TCP? , the Ceph, memory that compress and adds secret type of service is quickened. Quicken a function through these, alveo? SN1000 blocks help data center to answer analysis of machine study, data, video to turn better quickly group of code, video and image processing, gene learns, safe, finance calculates those who wait for a respect to accelerate requirement.

High-powered with efficient Alveo? U50 gets stuck quickly

Is the 2nd recommends a product a FPGA that comes from AMD gets stuck quickly likewise — Alveo? U50 gets stuck quickly, the makings date of this parts of an apparatus on net of official of trade lustre electron is A-U50-P00G-LV-G.

Graph 3: A-U50-P00G-LV-G

(graph source: Trade lustre electron)

Alveo? Does accelerator of U50 data center get stuck be based on UltraScale+ ? The framework is made, take the lead in using the over all dimension that grows high partly partly and the power comsumption of small parcel sth resembling a net under 75W. This product standards that gets stuck quickly is as follows:

● UltraScale+ framework

● Half tall, half long, sheet inserts groove thin model over all dimension

● Search watch amount: 872, 000

● HBM2 memory: 8GB

● HBM2 bandwidth: 316GB/s1

● Network interface: A QSFP28 (100GbE)

● Clock precision: IEEE 1588

● PCI Express: PCIe Gen3 X 16, double PCIe; Gen4 X 8, CCIX

● Passivity comes loose hot solution

● Power comsumption (TDP) : 75W

Alveo? U50 blocks the product advantage that has 3 big typical cases quickly:

● It is high-powered above all and efficient, network of 8GB HBM2, 100GbE and PCI Express 4.0 quickened card to bring high rate for this, carry the 100G network that supports 4x10GbE, 4x 25GbE or 1x 40GbE, 1x 100GbE, came true low when delay network function;

● It is agile meet an emergency next, the task that can answer computation, memory and network respect in the round is laden, pass the framework that can configure afresh as working load and algorithm (differ with fixed framework) ceaseless development, can with more improve applied performance substantially;

● Finally is to go to the lavatory to be used easily, alveo? U50 gets stuck to be built through elaborate literary composition quickly, can be in high in the clouds or this locality deploy (but crossing-over) the solution is patulous framework.

Have the aid of the product advantage of this 3 big typical cases, alveo? Load offers the task that U50 quickens card to be able to be finance to memory of computation, machine study, computation and data are searched and analyse a domain to support quickly.

Can you use at 10G to come the Virtex of 100G network? – 7 FPGA

As the ceaseless increase sharply of discharge, how does each big data center promote network bandwidth smoothly property, become the popular topic that the industry pays close attention to, in an attempt to is in road by, the respect implementation such as exchange, safety moves actor in the round. Next, do we recommend to you can be used at 10G to come for everybody the Virtex of 100G network? – 7 FPGA, it is to come from manufacturer AMD likewise, the makings date of this parts of an apparatus on net of official of trade lustre electron is XC7VX485T-1FFG1761C.

Virtex? – 7 FPGA is a series in FPGA of AMD 7 series, be based on low power comsumption (HPL) , grid of metal of 28nm, tall K (HKMG) engineering technology is made, offer be as high as 2M logistic unit, have excellent power comsumption performance to compare function of framework, DSP and I/O bandwidth. Virtex? – 7 FPGA offers freeboard to carry join bandwidth, total serial bandwidth is as high as 2.8TB/s, most support 96 X 13.1G GT, 16 X 28.05G GT, 5, 335 GMAC, 68Mb BRAM, DDR3-1866.

Express 1: Parameter of product of FPGA of AMD 7 series is expressed

(graph source: AMD)

Virtex? – 7 FPGA fits small size, cost sensitive, high capacity application, for instance 100GE circuitry gets stuck.

Help data center answers complex and changeful new setting

Measure as the data system inside data center bigger and bigger, and the industry applies to low when the requirement that extend is more and more slashing, FPGA occupies the promotion of central computation efficiency through logarithm, optimize to the abidance of communication network, the intelligence that promoted data center is changed upgrade, help its answer model of the new setting with complex all the more, new AI, each industry achieves final help society more deep-seated digitlization operation. It is on net of official of trade lustre electron, no matter be FPGA product,still be based on what FPGA comes true to quicken card, have rich product choice, have the aid of these high-powered parts of an apparatus, development staff can think data center is quickened again quickly.

Origin: Mouser

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