Example analyses the influence that manostat PCB layout brings

Example analyses the influence that manostat PCB layout brings

[introduction]Manostat of ADI LTC1871 switch is an asynchronous step up converter, its outputted end to use an exterior MOSFET and Xiaoteji diode, the step up converter that its SPICE model can use at compose to build an input voltage to be 12(V) and load current to be 24(A) for voltage of 1(V) , output, following graphs (graph 1) place is shown. Begin to move next emulate in order to observe the weaveform of every terminal.

The emulation circuit that the article explains how to use manostat of LTC1871 step up switch by engineer of science and technology of dragon of ADI agential fine horse will check switch weaveform, observe the PCB layout when parasitism inductance changes.

Use theoretical model undertakes emulation

Manostat of ADI LTC1871 switch is an asynchronous step up converter, its outputted end to use an exterior MOSFET and Xiaoteji diode, the step up converter that its SPICE model can use at compose to build an input voltage to be 12(V) and load current to be 24(A) for voltage of 1(V) , output, following graphs (graph 1) place is shown. Begin to move next emulate in order to observe the weaveform of every terminal.

Example analyses the influence that manostat PCB layout brings

LTC1871 switch manostat emulates a result

Emulation result pursues as follows (graph 2) place is shown, begin to be respectively from coping: Output weaveform, SENSE brings crural weaveform, I the weaveform that cite a base, GATE (BG) makes crural weaveform and switch (SW) node is undee. Come to be stability see it from weaveform, controlling the signal on the Ith that cite a base is clean, SENSE brings voltage aiguille of the foot to rise normally, and drive articulatory point do not have voltage aiguille. But actually this weaveform and emulated weaveform differ completely, switch node may have been encountered rush and GATE makes the strong case below the foot, this can exceed GATE to draw the biggest specification of the foot probably, same switch node also may fall rush and prep above is the biggest rating. In applying actually, of these circumstances can happen not only, and may because of PCB layout aggravate.

Example analyses the influence that manostat PCB layout brings

The reaction when inductance of circuit board parasitism changes

Put in parasitism component in actual circuit, for example parasitism inductance. Parasitism inductance is caused by component geometry appearance and PCB layout, because voltaic pressing is placed rate is very high, the parasitism inductance that establishs ties with MOSFET, diode and output capacitor may be put in a few problems, for example high pressure places the electric current of rate to be able to produce big tension in these parasitism inductance. Following graphs (place of red circle part shows graph 3) to add to have the circuit of step up converter of parasitism inductance, the GND that needs to add parasitism inductance controller above all in this circuit cites a base, the parasitism inductance beyond red circle can omit, because they are not important in be emulated this.

Example analyses the influence that manostat PCB layout brings

The influence with parasitism undee to output inductance

Can examine emulation result next, following graphs (graph 4) place is shown. Can observe from inside the graph the output that suffers inductance effect is undee, can see have many high frequency ringing. Among them the I of the first class control brings foot and the SENSE of the 2nd class to bring aiguille of voltage of the existence on the foot, these voltage aiguille may affect controller. There also is ringing on the PGND of controller of the 3rd class in addition, it produces voltage to differ between the GND of package of can outer ministry and controller. Drive of GATE of the 4th class brings a foot to also appear overmuch ringing, this ringing can be used effectively, but it is possible also the biggest rating that because exceed grid,cites a base causes trouble.

Example analyses the influence that manostat PCB layout brings

Pursue through falling (the enlarge in graph 5) outputs undee graph, can see the change of parasitism inductance more intuitionisticly, among them main problem feature is the biggest rating that exceeds controller to cite a base. Those who need an attention is, of grid driver bring a foot to circuit problem also may be caused after the influence of ringing, was thought to reduce these problems as far as possible, must fall parasitism inductance to lowest. Need to notice power MOSFET and output capacitor choose the component of low parasitism inductance above all in emulation process, outside power MOSFET (IPP052N06L3) uses TO-220 and TO-263 to enclose, the source that TO-220 seals apparel to one makes an appointment with 13mm to grow extremely cite a base, the TO-263 source that seals apparel to one makes an appointment with 4mm to grow extremely cite a base. Consider length only, the parasitism inductance that TO-220 encloses may compare TO-263 model 3 times bigger above.

For the smallest the inductance that changes output capacitor, the proposal chooses the surface to stick capacitor of outfit pottery and porcelain, is not the capacitor that takes down-lead terminal. In addition pass capacitor of shunt-wound pottery and porcelain, can reduce inductance of equivalent series connection significantly, to reduce parasitism inductance, power MOSFET, diode and output electric capacity should be stood by as far as possible place, use dumpy wiring connection.

Example analyses the influence that manostat PCB layout brings

Summary

The article is emulated through ideal circuit, the GND that showed LTC1871 oneself and exterior component GND can be achieved balanced, it is however in reality, of the parasitism inductance that circuit can suffer each component and PCB affect and bring about potential to swing, and from emulation weaveform the graph can see these parasitism inductance effect can bring about power source IC to malfunction.

Article origin: Yadenuo semiconductor

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